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cell-binutils  2.17cvs20070401
m32c-dis.c
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00001 /* Disassembler interface for targets using CGEN. -*- C -*-
00002    CGEN: Cpu tools GENerator
00003 
00004    THIS FILE IS MACHINE GENERATED WITH CGEN.
00005    - the resultant file is machine generated, cgen-dis.in isn't
00006 
00007    Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
00008    Free Software Foundation, Inc.
00009 
00010    This file is part of the GNU Binutils and GDB, the GNU debugger.
00011 
00012    This program is free software; you can redistribute it and/or modify
00013    it under the terms of the GNU General Public License as published by
00014    the Free Software Foundation; either version 2, or (at your option)
00015    any later version.
00016 
00017    This program is distributed in the hope that it will be useful,
00018    but WITHOUT ANY WARRANTY; without even the implied warranty of
00019    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00020    GNU General Public License for more details.
00021 
00022    You should have received a copy of the GNU General Public License
00023    along with this program; if not, write to the Free Software Foundation, Inc.,
00024    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00025 
00026 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
00027    Keep that in mind.  */
00028 
00029 #include "sysdep.h"
00030 #include <stdio.h>
00031 #include "ansidecl.h"
00032 #include "dis-asm.h"
00033 #include "bfd.h"
00034 #include "symcat.h"
00035 #include "libiberty.h"
00036 #include "m32c-desc.h"
00037 #include "m32c-opc.h"
00038 #include "opintl.h"
00039 
00040 /* Default text to print if an instruction isn't recognized.  */
00041 #define UNKNOWN_INSN_MSG _("*unknown*")
00042 
00043 static void print_normal
00044   (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
00045 static void print_address
00046   (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
00047 static void print_keyword
00048   (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
00049 static void print_insn_normal
00050   (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
00051 static int print_insn
00052   (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);
00053 static int default_print_insn
00054   (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
00055 static int read_insn
00056   (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
00057    unsigned long *);
00058 
00059 /* -- disassembler routines inserted here.  */
00060 
00061 /* -- dis.c */
00062 
00063 #include "elf/m32c.h"
00064 #include "elf-bfd.h"
00065 
00066 /* Always print the short insn format suffix as ':<char>'.  */
00067 
00068 static void
00069 print_suffix (void * dis_info, char suffix)
00070 {
00071   disassemble_info *info = dis_info;
00072 
00073   (*info->fprintf_func) (info->stream, ":%c", suffix);
00074 }
00075 
00076 static void
00077 print_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00078         void * dis_info,
00079         long value ATTRIBUTE_UNUSED,
00080         unsigned int attrs ATTRIBUTE_UNUSED,
00081         bfd_vma pc ATTRIBUTE_UNUSED,
00082         int length ATTRIBUTE_UNUSED)
00083 {
00084   print_suffix (dis_info, 's');
00085 }
00086 
00087 
00088 static void
00089 print_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00090         void * dis_info,
00091         long value ATTRIBUTE_UNUSED,
00092         unsigned int attrs ATTRIBUTE_UNUSED,
00093         bfd_vma pc ATTRIBUTE_UNUSED,
00094         int length ATTRIBUTE_UNUSED)
00095 {
00096   print_suffix (dis_info, 'g');
00097 }
00098 
00099 static void
00100 print_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00101         void * dis_info,
00102         long value ATTRIBUTE_UNUSED,
00103         unsigned int attrs ATTRIBUTE_UNUSED,
00104         bfd_vma pc ATTRIBUTE_UNUSED,
00105         int length ATTRIBUTE_UNUSED)
00106 {
00107   print_suffix (dis_info, 'q');
00108 }
00109 
00110 static void
00111 print_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00112         void * dis_info,
00113         long value ATTRIBUTE_UNUSED,
00114         unsigned int attrs ATTRIBUTE_UNUSED,
00115         bfd_vma pc ATTRIBUTE_UNUSED,
00116         int length ATTRIBUTE_UNUSED)
00117 {
00118   print_suffix (dis_info, 'z');
00119 }
00120 
00121 /* Print the empty suffix.  */
00122 
00123 static void
00124 print_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00125         void * dis_info ATTRIBUTE_UNUSED,
00126         long value ATTRIBUTE_UNUSED,
00127         unsigned int attrs ATTRIBUTE_UNUSED,
00128         bfd_vma pc ATTRIBUTE_UNUSED,
00129         int length ATTRIBUTE_UNUSED)
00130 {
00131   return;
00132 }
00133 
00134 static void
00135 print_r0l_r0h (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00136               void * dis_info,
00137               long value,
00138               unsigned int attrs ATTRIBUTE_UNUSED,
00139               bfd_vma pc ATTRIBUTE_UNUSED,
00140               int length ATTRIBUTE_UNUSED)
00141 {
00142   disassemble_info *info = dis_info;
00143 
00144   if (value == 0)
00145     (*info->fprintf_func) (info->stream, "r0h,r0l");
00146   else
00147     (*info->fprintf_func) (info->stream, "r0l,r0h");
00148 }
00149 
00150 static void
00151 print_unsigned_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00152                      void * dis_info,
00153                      unsigned long value,
00154                      unsigned int attrs ATTRIBUTE_UNUSED,
00155                      bfd_vma pc ATTRIBUTE_UNUSED,
00156                      int length ATTRIBUTE_UNUSED)
00157 {
00158   disassemble_info *info = dis_info;
00159 
00160   (*info->fprintf_func) (info->stream, "%ld,0x%lx", value & 0x7, value >> 3);
00161 }
00162 
00163 static void
00164 print_signed_bitbase (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00165                     void * dis_info,
00166                     signed long value,
00167                     unsigned int attrs ATTRIBUTE_UNUSED,
00168                     bfd_vma pc ATTRIBUTE_UNUSED,
00169                     int length ATTRIBUTE_UNUSED)
00170 {
00171   disassemble_info *info = dis_info;
00172 
00173   (*info->fprintf_func) (info->stream, "%ld,%ld", value & 0x7, value >> 3);
00174 }
00175 
00176 static void
00177 print_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00178            void * dis_info,
00179            long value ATTRIBUTE_UNUSED,
00180            unsigned int attrs ATTRIBUTE_UNUSED,
00181            bfd_vma pc ATTRIBUTE_UNUSED,
00182            int length ATTRIBUTE_UNUSED)
00183 {
00184   /* Always print the size as '.w'.  */
00185   disassemble_info *info = dis_info;
00186 
00187   (*info->fprintf_func) (info->stream, ".w");
00188 }
00189 
00190 #define POP  0
00191 #define PUSH 1
00192 
00193 static void print_pop_regset  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
00194 static void print_push_regset (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
00195 
00196 /* Print a set of registers, R0,R1,A0,A1,SB,FB.  */
00197 
00198 static void
00199 print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00200              void * dis_info,
00201              long value,
00202              unsigned int attrs ATTRIBUTE_UNUSED,
00203              bfd_vma pc ATTRIBUTE_UNUSED,
00204              int length ATTRIBUTE_UNUSED,
00205              int push)
00206 {
00207   static char * m16c_register_names [] = 
00208   {
00209     "r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
00210   };
00211   disassemble_info *info = dis_info;
00212   int mask;
00213   int index = 0;
00214   char* comma = "";
00215 
00216   if (push)
00217     mask = 0x80;
00218   else
00219     mask = 1;
00220  
00221   if (value & mask)
00222     {
00223       (*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
00224       comma = ",";
00225     }
00226 
00227   for (index = 1; index <= 7; ++index)
00228     {
00229       if (push)
00230         mask >>= 1;
00231       else
00232         mask <<= 1;
00233 
00234       if (value & mask)
00235         {
00236           (*info->fprintf_func) (info->stream, "%s%s", comma,
00237                              m16c_register_names [index]);
00238           comma = ",";
00239         }
00240     }
00241 }
00242 
00243 static void
00244 print_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00245                 void * dis_info,
00246                 long value,
00247                 unsigned int attrs ATTRIBUTE_UNUSED,
00248                 bfd_vma pc ATTRIBUTE_UNUSED,
00249                 int length ATTRIBUTE_UNUSED)
00250 {
00251   print_regset (cd, dis_info, value, attrs, pc, length, POP);
00252 }
00253 
00254 static void
00255 print_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00256                  void * dis_info,
00257                  long value,
00258                  unsigned int attrs ATTRIBUTE_UNUSED,
00259                  bfd_vma pc ATTRIBUTE_UNUSED,
00260                  int length ATTRIBUTE_UNUSED)
00261 {
00262   print_regset (cd, dis_info, value, attrs, pc, length, PUSH);
00263 }
00264 
00265 static void
00266 print_signed4n (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00267               void * dis_info,
00268               signed long value,
00269               unsigned int attrs ATTRIBUTE_UNUSED,
00270               bfd_vma pc ATTRIBUTE_UNUSED,
00271               int length ATTRIBUTE_UNUSED)
00272 {
00273   disassemble_info *info = dis_info;
00274 
00275   (*info->fprintf_func) (info->stream, "%ld", -value);
00276 }
00277 
00278 void m32c_cgen_print_operand
00279   (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
00280 
00281 /* Main entry point for printing operands.
00282    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
00283    of dis-asm.h on cgen.h.
00284 
00285    This function is basically just a big switch statement.  Earlier versions
00286    used tables to look up the function to use, but
00287    - if the table contains both assembler and disassembler functions then
00288      the disassembler contains much of the assembler and vice-versa,
00289    - there's a lot of inlining possibilities as things grow,
00290    - using a switch statement avoids the function call overhead.
00291 
00292    This function could be moved into `print_insn_normal', but keeping it
00293    separate makes clear the interface between `print_insn_normal' and each of
00294    the handlers.  */
00295 
00296 void
00297 m32c_cgen_print_operand (CGEN_CPU_DESC cd,
00298                         int opindex,
00299                         void * xinfo,
00300                         CGEN_FIELDS *fields,
00301                         void const *attrs ATTRIBUTE_UNUSED,
00302                         bfd_vma pc,
00303                         int length)
00304 {
00305   disassemble_info *info = (disassemble_info *) xinfo;
00306 
00307   switch (opindex)
00308     {
00309     case M32C_OPERAND_A0 :
00310       print_keyword (cd, info, & m32c_cgen_opval_h_a0, 0, 0);
00311       break;
00312     case M32C_OPERAND_A1 :
00313       print_keyword (cd, info, & m32c_cgen_opval_h_a1, 0, 0);
00314       break;
00315     case M32C_OPERAND_AN16_PUSH_S :
00316       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_4_1, 0);
00317       break;
00318     case M32C_OPERAND_BIT16AN :
00319       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
00320       break;
00321     case M32C_OPERAND_BIT16RN :
00322       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
00323       break;
00324     case M32C_OPERAND_BIT3_S :
00325       print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00326       break;
00327     case M32C_OPERAND_BIT32ANPREFIXED :
00328       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
00329       break;
00330     case M32C_OPERAND_BIT32ANUNPREFIXED :
00331       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
00332       break;
00333     case M32C_OPERAND_BIT32RNPREFIXED :
00334       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
00335       break;
00336     case M32C_OPERAND_BIT32RNUNPREFIXED :
00337       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
00338       break;
00339     case M32C_OPERAND_BITBASE16_16_S8 :
00340       print_signed_bitbase (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00341       break;
00342     case M32C_OPERAND_BITBASE16_16_U16 :
00343       print_unsigned_bitbase (cd, info, fields->f_dsp_16_u16, 0, pc, length);
00344       break;
00345     case M32C_OPERAND_BITBASE16_16_U8 :
00346       print_unsigned_bitbase (cd, info, fields->f_dsp_16_u8, 0, pc, length);
00347       break;
00348     case M32C_OPERAND_BITBASE16_8_U11_S :
00349       print_unsigned_bitbase (cd, info, fields->f_bitbase16_u11_S, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00350       break;
00351     case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
00352       print_signed_bitbase (cd, info, fields->f_bitbase32_16_s11_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00353       break;
00354     case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
00355       print_signed_bitbase (cd, info, fields->f_bitbase32_16_s19_unprefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00356       break;
00357     case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
00358       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u11_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00359       break;
00360     case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
00361       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u19_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00362       break;
00363     case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
00364       print_unsigned_bitbase (cd, info, fields->f_bitbase32_16_u27_unprefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00365       break;
00366     case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
00367       print_signed_bitbase (cd, info, fields->f_bitbase32_24_s11_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00368       break;
00369     case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
00370       print_signed_bitbase (cd, info, fields->f_bitbase32_24_s19_prefixed, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00371       break;
00372     case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
00373       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u11_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00374       break;
00375     case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
00376       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u19_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00377       break;
00378     case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
00379       print_unsigned_bitbase (cd, info, fields->f_bitbase32_24_u27_prefixed, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00380       break;
00381     case M32C_OPERAND_BITNO16R :
00382       print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
00383       break;
00384     case M32C_OPERAND_BITNO32PREFIXED :
00385       print_normal (cd, info, fields->f_bitno32_prefixed, 0, pc, length);
00386       break;
00387     case M32C_OPERAND_BITNO32UNPREFIXED :
00388       print_normal (cd, info, fields->f_bitno32_unprefixed, 0, pc, length);
00389       break;
00390     case M32C_OPERAND_DSP_10_U6 :
00391       print_normal (cd, info, fields->f_dsp_10_u6, 0, pc, length);
00392       break;
00393     case M32C_OPERAND_DSP_16_S16 :
00394       print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00395       break;
00396     case M32C_OPERAND_DSP_16_S8 :
00397       print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00398       break;
00399     case M32C_OPERAND_DSP_16_U16 :
00400       print_normal (cd, info, fields->f_dsp_16_u16, 0, pc, length);
00401       break;
00402     case M32C_OPERAND_DSP_16_U20 :
00403       print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00404       break;
00405     case M32C_OPERAND_DSP_16_U24 :
00406       print_normal (cd, info, fields->f_dsp_16_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00407       break;
00408     case M32C_OPERAND_DSP_16_U8 :
00409       print_normal (cd, info, fields->f_dsp_16_u8, 0, pc, length);
00410       break;
00411     case M32C_OPERAND_DSP_24_S16 :
00412       print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00413       break;
00414     case M32C_OPERAND_DSP_24_S8 :
00415       print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00416       break;
00417     case M32C_OPERAND_DSP_24_U16 :
00418       print_normal (cd, info, fields->f_dsp_24_u16, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00419       break;
00420     case M32C_OPERAND_DSP_24_U20 :
00421       print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00422       break;
00423     case M32C_OPERAND_DSP_24_U24 :
00424       print_normal (cd, info, fields->f_dsp_24_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00425       break;
00426     case M32C_OPERAND_DSP_24_U8 :
00427       print_normal (cd, info, fields->f_dsp_24_u8, 0, pc, length);
00428       break;
00429     case M32C_OPERAND_DSP_32_S16 :
00430       print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00431       break;
00432     case M32C_OPERAND_DSP_32_S8 :
00433       print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00434       break;
00435     case M32C_OPERAND_DSP_32_U16 :
00436       print_normal (cd, info, fields->f_dsp_32_u16, 0, pc, length);
00437       break;
00438     case M32C_OPERAND_DSP_32_U20 :
00439       print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
00440       break;
00441     case M32C_OPERAND_DSP_32_U24 :
00442       print_normal (cd, info, fields->f_dsp_32_u24, 0, pc, length);
00443       break;
00444     case M32C_OPERAND_DSP_32_U8 :
00445       print_normal (cd, info, fields->f_dsp_32_u8, 0, pc, length);
00446       break;
00447     case M32C_OPERAND_DSP_40_S16 :
00448       print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00449       break;
00450     case M32C_OPERAND_DSP_40_S8 :
00451       print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00452       break;
00453     case M32C_OPERAND_DSP_40_U16 :
00454       print_normal (cd, info, fields->f_dsp_40_u16, 0, pc, length);
00455       break;
00456     case M32C_OPERAND_DSP_40_U20 :
00457       print_normal (cd, info, fields->f_dsp_40_u20, 0, pc, length);
00458       break;
00459     case M32C_OPERAND_DSP_40_U24 :
00460       print_normal (cd, info, fields->f_dsp_40_u24, 0, pc, length);
00461       break;
00462     case M32C_OPERAND_DSP_40_U8 :
00463       print_normal (cd, info, fields->f_dsp_40_u8, 0, pc, length);
00464       break;
00465     case M32C_OPERAND_DSP_48_S16 :
00466       print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00467       break;
00468     case M32C_OPERAND_DSP_48_S8 :
00469       print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00470       break;
00471     case M32C_OPERAND_DSP_48_U16 :
00472       print_normal (cd, info, fields->f_dsp_48_u16, 0, pc, length);
00473       break;
00474     case M32C_OPERAND_DSP_48_U20 :
00475       print_normal (cd, info, fields->f_dsp_48_u20, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00476       break;
00477     case M32C_OPERAND_DSP_48_U24 :
00478       print_normal (cd, info, fields->f_dsp_48_u24, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00479       break;
00480     case M32C_OPERAND_DSP_48_U8 :
00481       print_normal (cd, info, fields->f_dsp_48_u8, 0, pc, length);
00482       break;
00483     case M32C_OPERAND_DSP_8_S24 :
00484       print_normal (cd, info, fields->f_dsp_8_s24, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00485       break;
00486     case M32C_OPERAND_DSP_8_S8 :
00487       print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00488       break;
00489     case M32C_OPERAND_DSP_8_U16 :
00490       print_normal (cd, info, fields->f_dsp_8_u16, 0, pc, length);
00491       break;
00492     case M32C_OPERAND_DSP_8_U24 :
00493       print_normal (cd, info, fields->f_dsp_8_u24, 0, pc, length);
00494       break;
00495     case M32C_OPERAND_DSP_8_U6 :
00496       print_normal (cd, info, fields->f_dsp_8_u6, 0, pc, length);
00497       break;
00498     case M32C_OPERAND_DSP_8_U8 :
00499       print_normal (cd, info, fields->f_dsp_8_u8, 0, pc, length);
00500       break;
00501     case M32C_OPERAND_DST16AN :
00502       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst16_an, 0);
00503       break;
00504     case M32C_OPERAND_DST16AN_S :
00505       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an_s, 0);
00506       break;
00507     case M32C_OPERAND_DST16ANHI :
00508       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst16_an, 0);
00509       break;
00510     case M32C_OPERAND_DST16ANQI :
00511       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_an, 0);
00512       break;
00513     case M32C_OPERAND_DST16ANQI_S :
00514       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst16_rn_QI_s, 0);
00515       break;
00516     case M32C_OPERAND_DST16ANSI :
00517       print_keyword (cd, info, & m32c_cgen_opval_h_ar_SI, fields->f_dst16_an, 0);
00518       break;
00519     case M32C_OPERAND_DST16RNEXTQI :
00520       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst16_rn_ext, 0);
00521       break;
00522     case M32C_OPERAND_DST16RNHI :
00523       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst16_rn, 0);
00524       break;
00525     case M32C_OPERAND_DST16RNQI :
00526       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst16_rn, 0);
00527       break;
00528     case M32C_OPERAND_DST16RNQI_S :
00529       print_keyword (cd, info, & m32c_cgen_opval_h_r0l_r0h, fields->f_dst16_rn_QI_s, 0);
00530       break;
00531     case M32C_OPERAND_DST16RNSI :
00532       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst16_rn, 0);
00533       break;
00534     case M32C_OPERAND_DST32ANEXTUNPREFIXED :
00535       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
00536       break;
00537     case M32C_OPERAND_DST32ANPREFIXED :
00538       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
00539       break;
00540     case M32C_OPERAND_DST32ANPREFIXEDHI :
00541       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_prefixed, 0);
00542       break;
00543     case M32C_OPERAND_DST32ANPREFIXEDQI :
00544       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_prefixed, 0);
00545       break;
00546     case M32C_OPERAND_DST32ANPREFIXEDSI :
00547       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_prefixed, 0);
00548       break;
00549     case M32C_OPERAND_DST32ANUNPREFIXED :
00550       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
00551       break;
00552     case M32C_OPERAND_DST32ANUNPREFIXEDHI :
00553       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_dst32_an_unprefixed, 0);
00554       break;
00555     case M32C_OPERAND_DST32ANUNPREFIXEDQI :
00556       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_dst32_an_unprefixed, 0);
00557       break;
00558     case M32C_OPERAND_DST32ANUNPREFIXEDSI :
00559       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_dst32_an_unprefixed, 0);
00560       break;
00561     case M32C_OPERAND_DST32R0HI_S :
00562       print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
00563       break;
00564     case M32C_OPERAND_DST32R0QI_S :
00565       print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
00566       break;
00567     case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
00568       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_HI, fields->f_dst32_rn_ext_unprefixed, 0);
00569       break;
00570     case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
00571       print_keyword (cd, info, & m32c_cgen_opval_h_gr_ext_QI, fields->f_dst32_rn_ext_unprefixed, 0);
00572       break;
00573     case M32C_OPERAND_DST32RNPREFIXEDHI :
00574       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_prefixed_HI, 0);
00575       break;
00576     case M32C_OPERAND_DST32RNPREFIXEDQI :
00577       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_prefixed_QI, 0);
00578       break;
00579     case M32C_OPERAND_DST32RNPREFIXEDSI :
00580       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_prefixed_SI, 0);
00581       break;
00582     case M32C_OPERAND_DST32RNUNPREFIXEDHI :
00583       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_dst32_rn_unprefixed_HI, 0);
00584       break;
00585     case M32C_OPERAND_DST32RNUNPREFIXEDQI :
00586       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_dst32_rn_unprefixed_QI, 0);
00587       break;
00588     case M32C_OPERAND_DST32RNUNPREFIXEDSI :
00589       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_dst32_rn_unprefixed_SI, 0);
00590       break;
00591     case M32C_OPERAND_G :
00592       print_G (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00593       break;
00594     case M32C_OPERAND_IMM_12_S4 :
00595       print_normal (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00596       break;
00597     case M32C_OPERAND_IMM_12_S4N :
00598       print_signed4n (cd, info, fields->f_imm_12_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00599       break;
00600     case M32C_OPERAND_IMM_13_U3 :
00601       print_normal (cd, info, fields->f_imm_13_u3, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00602       break;
00603     case M32C_OPERAND_IMM_16_HI :
00604       print_normal (cd, info, fields->f_dsp_16_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00605       break;
00606     case M32C_OPERAND_IMM_16_QI :
00607       print_normal (cd, info, fields->f_dsp_16_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00608       break;
00609     case M32C_OPERAND_IMM_16_SI :
00610       print_normal (cd, info, fields->f_dsp_16_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00611       break;
00612     case M32C_OPERAND_IMM_20_S4 :
00613       print_normal (cd, info, fields->f_imm_20_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00614       break;
00615     case M32C_OPERAND_IMM_24_HI :
00616       print_normal (cd, info, fields->f_dsp_24_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00617       break;
00618     case M32C_OPERAND_IMM_24_QI :
00619       print_normal (cd, info, fields->f_dsp_24_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00620       break;
00621     case M32C_OPERAND_IMM_24_SI :
00622       print_normal (cd, info, fields->f_dsp_24_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00623       break;
00624     case M32C_OPERAND_IMM_32_HI :
00625       print_normal (cd, info, fields->f_dsp_32_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00626       break;
00627     case M32C_OPERAND_IMM_32_QI :
00628       print_normal (cd, info, fields->f_dsp_32_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00629       break;
00630     case M32C_OPERAND_IMM_32_SI :
00631       print_normal (cd, info, fields->f_dsp_32_s32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00632       break;
00633     case M32C_OPERAND_IMM_40_HI :
00634       print_normal (cd, info, fields->f_dsp_40_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00635       break;
00636     case M32C_OPERAND_IMM_40_QI :
00637       print_normal (cd, info, fields->f_dsp_40_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00638       break;
00639     case M32C_OPERAND_IMM_40_SI :
00640       print_normal (cd, info, fields->f_dsp_40_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00641       break;
00642     case M32C_OPERAND_IMM_48_HI :
00643       print_normal (cd, info, fields->f_dsp_48_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00644       break;
00645     case M32C_OPERAND_IMM_48_QI :
00646       print_normal (cd, info, fields->f_dsp_48_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00647       break;
00648     case M32C_OPERAND_IMM_48_SI :
00649       print_normal (cd, info, fields->f_dsp_48_s32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00650       break;
00651     case M32C_OPERAND_IMM_56_HI :
00652       print_normal (cd, info, fields->f_dsp_56_s16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00653       break;
00654     case M32C_OPERAND_IMM_56_QI :
00655       print_normal (cd, info, fields->f_dsp_56_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00656       break;
00657     case M32C_OPERAND_IMM_64_HI :
00658       print_normal (cd, info, fields->f_dsp_64_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00659       break;
00660     case M32C_OPERAND_IMM_8_HI :
00661       print_normal (cd, info, fields->f_dsp_8_s16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00662       break;
00663     case M32C_OPERAND_IMM_8_QI :
00664       print_normal (cd, info, fields->f_dsp_8_s8, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00665       break;
00666     case M32C_OPERAND_IMM_8_S4 :
00667       print_normal (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00668       break;
00669     case M32C_OPERAND_IMM_8_S4N :
00670       print_signed4n (cd, info, fields->f_imm_8_s4, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00671       break;
00672     case M32C_OPERAND_IMM_SH_12_S4 :
00673       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_12_s4, 0);
00674       break;
00675     case M32C_OPERAND_IMM_SH_20_S4 :
00676       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_20_s4, 0);
00677       break;
00678     case M32C_OPERAND_IMM_SH_8_S4 :
00679       print_keyword (cd, info, & m32c_cgen_opval_h_shimm, fields->f_imm_8_s4, 0);
00680       break;
00681     case M32C_OPERAND_IMM1_S :
00682       print_normal (cd, info, fields->f_imm1_S, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00683       break;
00684     case M32C_OPERAND_IMM3_S :
00685       print_normal (cd, info, fields->f_imm3_S, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00686       break;
00687     case M32C_OPERAND_LAB_16_8 :
00688       print_address (cd, info, fields->f_lab_16_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00689       break;
00690     case M32C_OPERAND_LAB_24_8 :
00691       print_address (cd, info, fields->f_lab_24_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00692       break;
00693     case M32C_OPERAND_LAB_32_8 :
00694       print_address (cd, info, fields->f_lab_32_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00695       break;
00696     case M32C_OPERAND_LAB_40_8 :
00697       print_address (cd, info, fields->f_lab_40_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00698       break;
00699     case M32C_OPERAND_LAB_5_3 :
00700       print_address (cd, info, fields->f_lab_5_3, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00701       break;
00702     case M32C_OPERAND_LAB_8_16 :
00703       print_address (cd, info, fields->f_lab_8_16, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00704       break;
00705     case M32C_OPERAND_LAB_8_24 :
00706       print_address (cd, info, fields->f_lab_8_24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
00707       break;
00708     case M32C_OPERAND_LAB_8_8 :
00709       print_address (cd, info, fields->f_lab_8_8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
00710       break;
00711     case M32C_OPERAND_LAB32_JMP_S :
00712       print_address (cd, info, fields->f_lab32_jmp_s, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_PCREL_ADDR)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
00713       break;
00714     case M32C_OPERAND_Q :
00715       print_Q (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00716       break;
00717     case M32C_OPERAND_R0 :
00718       print_keyword (cd, info, & m32c_cgen_opval_h_r0, 0, 0);
00719       break;
00720     case M32C_OPERAND_R0H :
00721       print_keyword (cd, info, & m32c_cgen_opval_h_r0h, 0, 0);
00722       break;
00723     case M32C_OPERAND_R0L :
00724       print_keyword (cd, info, & m32c_cgen_opval_h_r0l, 0, 0);
00725       break;
00726     case M32C_OPERAND_R1 :
00727       print_keyword (cd, info, & m32c_cgen_opval_h_r1, 0, 0);
00728       break;
00729     case M32C_OPERAND_R1R2R0 :
00730       print_keyword (cd, info, & m32c_cgen_opval_h_r1r2r0, 0, 0);
00731       break;
00732     case M32C_OPERAND_R2 :
00733       print_keyword (cd, info, & m32c_cgen_opval_h_r2, 0, 0);
00734       break;
00735     case M32C_OPERAND_R2R0 :
00736       print_keyword (cd, info, & m32c_cgen_opval_h_r2r0, 0, 0);
00737       break;
00738     case M32C_OPERAND_R3 :
00739       print_keyword (cd, info, & m32c_cgen_opval_h_r3, 0, 0);
00740       break;
00741     case M32C_OPERAND_R3R1 :
00742       print_keyword (cd, info, & m32c_cgen_opval_h_r3r1, 0, 0);
00743       break;
00744     case M32C_OPERAND_REGSETPOP :
00745       print_pop_regset (cd, info, fields->f_8_8, 0, pc, length);
00746       break;
00747     case M32C_OPERAND_REGSETPUSH :
00748       print_push_regset (cd, info, fields->f_8_8, 0, pc, length);
00749       break;
00750     case M32C_OPERAND_RN16_PUSH_S :
00751       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_4_1, 0);
00752       break;
00753     case M32C_OPERAND_S :
00754       print_S (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00755       break;
00756     case M32C_OPERAND_SRC16AN :
00757       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src16_an, 0);
00758       break;
00759     case M32C_OPERAND_SRC16ANHI :
00760       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src16_an, 0);
00761       break;
00762     case M32C_OPERAND_SRC16ANQI :
00763       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src16_an, 0);
00764       break;
00765     case M32C_OPERAND_SRC16RNHI :
00766       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src16_rn, 0);
00767       break;
00768     case M32C_OPERAND_SRC16RNQI :
00769       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src16_rn, 0);
00770       break;
00771     case M32C_OPERAND_SRC32ANPREFIXED :
00772       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
00773       break;
00774     case M32C_OPERAND_SRC32ANPREFIXEDHI :
00775       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_prefixed, 0);
00776       break;
00777     case M32C_OPERAND_SRC32ANPREFIXEDQI :
00778       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_prefixed, 0);
00779       break;
00780     case M32C_OPERAND_SRC32ANPREFIXEDSI :
00781       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_prefixed, 0);
00782       break;
00783     case M32C_OPERAND_SRC32ANUNPREFIXED :
00784       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
00785       break;
00786     case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
00787       print_keyword (cd, info, & m32c_cgen_opval_h_ar_HI, fields->f_src32_an_unprefixed, 0);
00788       break;
00789     case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
00790       print_keyword (cd, info, & m32c_cgen_opval_h_ar_QI, fields->f_src32_an_unprefixed, 0);
00791       break;
00792     case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
00793       print_keyword (cd, info, & m32c_cgen_opval_h_ar, fields->f_src32_an_unprefixed, 0);
00794       break;
00795     case M32C_OPERAND_SRC32RNPREFIXEDHI :
00796       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_prefixed_HI, 0);
00797       break;
00798     case M32C_OPERAND_SRC32RNPREFIXEDQI :
00799       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_prefixed_QI, 0);
00800       break;
00801     case M32C_OPERAND_SRC32RNPREFIXEDSI :
00802       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_prefixed_SI, 0);
00803       break;
00804     case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
00805       print_keyword (cd, info, & m32c_cgen_opval_h_gr_HI, fields->f_src32_rn_unprefixed_HI, 0);
00806       break;
00807     case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
00808       print_keyword (cd, info, & m32c_cgen_opval_h_gr_QI, fields->f_src32_rn_unprefixed_QI, 0);
00809       break;
00810     case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
00811       print_keyword (cd, info, & m32c_cgen_opval_h_gr_SI, fields->f_src32_rn_unprefixed_SI, 0);
00812       break;
00813     case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
00814       print_r0l_r0h (cd, info, fields->f_5_1, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00815       break;
00816     case M32C_OPERAND_X :
00817       print_X (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00818       break;
00819     case M32C_OPERAND_Z :
00820       print_Z (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00821       break;
00822     case M32C_OPERAND_COND16_16 :
00823       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_16_u8, 0);
00824       break;
00825     case M32C_OPERAND_COND16_24 :
00826       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_24_u8, 0);
00827       break;
00828     case M32C_OPERAND_COND16_32 :
00829       print_keyword (cd, info, & m32c_cgen_opval_h_cond16, fields->f_dsp_32_u8, 0);
00830       break;
00831     case M32C_OPERAND_COND16C :
00832       print_keyword (cd, info, & m32c_cgen_opval_h_cond16c, fields->f_cond16, 0);
00833       break;
00834     case M32C_OPERAND_COND16J :
00835       print_keyword (cd, info, & m32c_cgen_opval_h_cond16j, fields->f_cond16, 0);
00836       break;
00837     case M32C_OPERAND_COND16J5 :
00838       print_keyword (cd, info, & m32c_cgen_opval_h_cond16j_5, fields->f_cond16j_5, 0);
00839       break;
00840     case M32C_OPERAND_COND32 :
00841       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32, 0|(1<<CGEN_OPERAND_VIRTUAL));
00842       break;
00843     case M32C_OPERAND_COND32_16 :
00844       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_16_u8, 0);
00845       break;
00846     case M32C_OPERAND_COND32_24 :
00847       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_24_u8, 0);
00848       break;
00849     case M32C_OPERAND_COND32_32 :
00850       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_32_u8, 0);
00851       break;
00852     case M32C_OPERAND_COND32_40 :
00853       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_dsp_40_u8, 0);
00854       break;
00855     case M32C_OPERAND_COND32J :
00856       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond32j, 0|(1<<CGEN_OPERAND_VIRTUAL));
00857       break;
00858     case M32C_OPERAND_CR1_PREFIXED_32 :
00859       print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_21_3, 0);
00860       break;
00861     case M32C_OPERAND_CR1_UNPREFIXED_32 :
00862       print_keyword (cd, info, & m32c_cgen_opval_h_cr1_32, fields->f_13_3, 0);
00863       break;
00864     case M32C_OPERAND_CR16 :
00865       print_keyword (cd, info, & m32c_cgen_opval_h_cr_16, fields->f_9_3, 0);
00866       break;
00867     case M32C_OPERAND_CR2_32 :
00868       print_keyword (cd, info, & m32c_cgen_opval_h_cr2_32, fields->f_13_3, 0);
00869       break;
00870     case M32C_OPERAND_CR3_PREFIXED_32 :
00871       print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_21_3, 0);
00872       break;
00873     case M32C_OPERAND_CR3_UNPREFIXED_32 :
00874       print_keyword (cd, info, & m32c_cgen_opval_h_cr3_32, fields->f_13_3, 0);
00875       break;
00876     case M32C_OPERAND_FLAGS16 :
00877       print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_9_3, 0);
00878       break;
00879     case M32C_OPERAND_FLAGS32 :
00880       print_keyword (cd, info, & m32c_cgen_opval_h_flags, fields->f_13_3, 0);
00881       break;
00882     case M32C_OPERAND_SCCOND32 :
00883       print_keyword (cd, info, & m32c_cgen_opval_h_cond32, fields->f_cond16, 0);
00884       break;
00885     case M32C_OPERAND_SIZE :
00886       print_size (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
00887       break;
00888 
00889     default :
00890       /* xgettext:c-format */
00891       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
00892               opindex);
00893     abort ();
00894   }
00895 }
00896 
00897 cgen_print_fn * const m32c_cgen_print_handlers[] = 
00898 {
00899   print_insn_normal,
00900 };
00901 
00902 
00903 void
00904 m32c_cgen_init_dis (CGEN_CPU_DESC cd)
00905 {
00906   m32c_cgen_init_opcode_table (cd);
00907   m32c_cgen_init_ibld_table (cd);
00908   cd->print_handlers = & m32c_cgen_print_handlers[0];
00909   cd->print_operand = m32c_cgen_print_operand;
00910 }
00911 
00912 
00913 /* Default print handler.  */
00914 
00915 static void
00916 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00917              void *dis_info,
00918              long value,
00919              unsigned int attrs,
00920              bfd_vma pc ATTRIBUTE_UNUSED,
00921              int length ATTRIBUTE_UNUSED)
00922 {
00923   disassemble_info *info = (disassemble_info *) dis_info;
00924 
00925 #ifdef CGEN_PRINT_NORMAL
00926   CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
00927 #endif
00928 
00929   /* Print the operand as directed by the attributes.  */
00930   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
00931     ; /* nothing to do */
00932   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
00933     (*info->fprintf_func) (info->stream, "%ld", value);
00934   else
00935     (*info->fprintf_func) (info->stream, "0x%lx", value);
00936 }
00937 
00938 /* Default address handler.  */
00939 
00940 static void
00941 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00942               void *dis_info,
00943               bfd_vma value,
00944               unsigned int attrs,
00945               bfd_vma pc ATTRIBUTE_UNUSED,
00946               int length ATTRIBUTE_UNUSED)
00947 {
00948   disassemble_info *info = (disassemble_info *) dis_info;
00949 
00950 #ifdef CGEN_PRINT_ADDRESS
00951   CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
00952 #endif
00953 
00954   /* Print the operand as directed by the attributes.  */
00955   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
00956     ; /* Nothing to do.  */
00957   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
00958     (*info->print_address_func) (value, info);
00959   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
00960     (*info->print_address_func) (value, info);
00961   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
00962     (*info->fprintf_func) (info->stream, "%ld", (long) value);
00963   else
00964     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
00965 }
00966 
00967 /* Keyword print handler.  */
00968 
00969 static void
00970 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
00971               void *dis_info,
00972               CGEN_KEYWORD *keyword_table,
00973               long value,
00974               unsigned int attrs ATTRIBUTE_UNUSED)
00975 {
00976   disassemble_info *info = (disassemble_info *) dis_info;
00977   const CGEN_KEYWORD_ENTRY *ke;
00978 
00979   ke = cgen_keyword_lookup_value (keyword_table, value);
00980   if (ke != NULL)
00981     (*info->fprintf_func) (info->stream, "%s", ke->name);
00982   else
00983     (*info->fprintf_func) (info->stream, "???");
00984 }
00985 
00986 /* Default insn printer.
00987 
00988    DIS_INFO is defined as `void *' so the disassembler needn't know anything
00989    about disassemble_info.  */
00990 
00991 static void
00992 print_insn_normal (CGEN_CPU_DESC cd,
00993                  void *dis_info,
00994                  const CGEN_INSN *insn,
00995                  CGEN_FIELDS *fields,
00996                  bfd_vma pc,
00997                  int length)
00998 {
00999   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
01000   disassemble_info *info = (disassemble_info *) dis_info;
01001   const CGEN_SYNTAX_CHAR_TYPE *syn;
01002 
01003   CGEN_INIT_PRINT (cd);
01004 
01005   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
01006     {
01007       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
01008        {
01009          (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
01010          continue;
01011        }
01012       if (CGEN_SYNTAX_CHAR_P (*syn))
01013        {
01014          (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
01015          continue;
01016        }
01017 
01018       /* We have an operand.  */
01019       m32c_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
01020                              fields, CGEN_INSN_ATTRS (insn), pc, length);
01021     }
01022 }
01023 
01024 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
01025    the extract info.
01026    Returns 0 if all is well, non-zero otherwise.  */
01027 
01028 static int
01029 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
01030           bfd_vma pc,
01031           disassemble_info *info,
01032           bfd_byte *buf,
01033           int buflen,
01034           CGEN_EXTRACT_INFO *ex_info,
01035           unsigned long *insn_value)
01036 {
01037   int status = (*info->read_memory_func) (pc, buf, buflen, info);
01038 
01039   if (status != 0)
01040     {
01041       (*info->memory_error_func) (status, pc, info);
01042       return -1;
01043     }
01044 
01045   ex_info->dis_info = info;
01046   ex_info->valid = (1 << buflen) - 1;
01047   ex_info->insn_bytes = buf;
01048 
01049   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
01050   return 0;
01051 }
01052 
01053 /* Utility to print an insn.
01054    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
01055    The result is the size of the insn in bytes or zero for an unknown insn
01056    or -1 if an error occurs fetching data (memory_error_func will have
01057    been called).  */
01058 
01059 static int
01060 print_insn (CGEN_CPU_DESC cd,
01061            bfd_vma pc,
01062            disassemble_info *info,
01063            bfd_byte *buf,
01064            unsigned int buflen)
01065 {
01066   CGEN_INSN_INT insn_value;
01067   const CGEN_INSN_LIST *insn_list;
01068   CGEN_EXTRACT_INFO ex_info;
01069   int basesize;
01070 
01071   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
01072   basesize = cd->base_insn_bitsize < buflen * 8 ?
01073                                      cd->base_insn_bitsize : buflen * 8;
01074   insn_value = cgen_get_insn_value (cd, buf, basesize);
01075 
01076 
01077   /* Fill in ex_info fields like read_insn would.  Don't actually call
01078      read_insn, since the incoming buffer is already read (and possibly
01079      modified a la m32r).  */
01080   ex_info.valid = (1 << buflen) - 1;
01081   ex_info.dis_info = info;
01082   ex_info.insn_bytes = buf;
01083 
01084   /* The instructions are stored in hash lists.
01085      Pick the first one and keep trying until we find the right one.  */
01086 
01087   insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
01088   while (insn_list != NULL)
01089     {
01090       const CGEN_INSN *insn = insn_list->insn;
01091       CGEN_FIELDS fields;
01092       int length;
01093       unsigned long insn_value_cropped;
01094 
01095 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 
01096       /* Not needed as insn shouldn't be in hash lists if not supported.  */
01097       /* Supported by this cpu?  */
01098       if (! m32c_cgen_insn_supported (cd, insn))
01099         {
01100           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
01101          continue;
01102         }
01103 #endif
01104 
01105       /* Basic bit mask must be correct.  */
01106       /* ??? May wish to allow target to defer this check until the extract
01107         handler.  */
01108 
01109       /* Base size may exceed this instruction's size.  Extract the
01110          relevant part from the buffer. */
01111       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
01112          (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
01113        insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 
01114                                       info->endian == BFD_ENDIAN_BIG);
01115       else
01116        insn_value_cropped = insn_value;
01117 
01118       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
01119          == CGEN_INSN_BASE_VALUE (insn))
01120        {
01121          /* Printing is handled in two passes.  The first pass parses the
01122             machine insn and extracts the fields.  The second pass prints
01123             them.  */
01124 
01125          /* Make sure the entire insn is loaded into insn_value, if it
01126             can fit.  */
01127          if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
01128              (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
01129            {
01130              unsigned long full_insn_value;
01131              int rc = read_insn (cd, pc, info, buf,
01132                               CGEN_INSN_BITSIZE (insn) / 8,
01133                               & ex_info, & full_insn_value);
01134              if (rc != 0)
01135               return rc;
01136              length = CGEN_EXTRACT_FN (cd, insn)
01137               (cd, insn, &ex_info, full_insn_value, &fields, pc);
01138            }
01139          else
01140            length = CGEN_EXTRACT_FN (cd, insn)
01141              (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
01142 
01143          /* Length < 0 -> error.  */
01144          if (length < 0)
01145            return length;
01146          if (length > 0)
01147            {
01148              CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
01149              /* Length is in bits, result is in bytes.  */
01150              return length / 8;
01151            }
01152        }
01153 
01154       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
01155     }
01156 
01157   return 0;
01158 }
01159 
01160 /* Default value for CGEN_PRINT_INSN.
01161    The result is the size of the insn in bytes or zero for an unknown insn
01162    or -1 if an error occured fetching bytes.  */
01163 
01164 #ifndef CGEN_PRINT_INSN
01165 #define CGEN_PRINT_INSN default_print_insn
01166 #endif
01167 
01168 static int
01169 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
01170 {
01171   bfd_byte buf[CGEN_MAX_INSN_SIZE];
01172   int buflen;
01173   int status;
01174 
01175   /* Attempt to read the base part of the insn.  */
01176   buflen = cd->base_insn_bitsize / 8;
01177   status = (*info->read_memory_func) (pc, buf, buflen, info);
01178 
01179   /* Try again with the minimum part, if min < base.  */
01180   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
01181     {
01182       buflen = cd->min_insn_bitsize / 8;
01183       status = (*info->read_memory_func) (pc, buf, buflen, info);
01184     }
01185 
01186   if (status != 0)
01187     {
01188       (*info->memory_error_func) (status, pc, info);
01189       return -1;
01190     }
01191 
01192   return print_insn (cd, pc, info, buf, buflen);
01193 }
01194 
01195 /* Main entry point.
01196    Print one instruction from PC on INFO->STREAM.
01197    Return the size of the instruction (in bytes).  */
01198 
01199 typedef struct cpu_desc_list
01200 {
01201   struct cpu_desc_list *next;
01202   CGEN_BITSET *isa;
01203   int mach;
01204   int endian;
01205   CGEN_CPU_DESC cd;
01206 } cpu_desc_list;
01207 
01208 int
01209 print_insn_m32c (bfd_vma pc, disassemble_info *info)
01210 {
01211   static cpu_desc_list *cd_list = 0;
01212   cpu_desc_list *cl = 0;
01213   static CGEN_CPU_DESC cd = 0;
01214   static CGEN_BITSET *prev_isa;
01215   static int prev_mach;
01216   static int prev_endian;
01217   int length;
01218   CGEN_BITSET *isa;
01219   int mach;
01220   int endian = (info->endian == BFD_ENDIAN_BIG
01221               ? CGEN_ENDIAN_BIG
01222               : CGEN_ENDIAN_LITTLE);
01223   enum bfd_architecture arch;
01224 
01225   /* ??? gdb will set mach but leave the architecture as "unknown" */
01226 #ifndef CGEN_BFD_ARCH
01227 #define CGEN_BFD_ARCH bfd_arch_m32c
01228 #endif
01229   arch = info->arch;
01230   if (arch == bfd_arch_unknown)
01231     arch = CGEN_BFD_ARCH;
01232    
01233   /* There's no standard way to compute the machine or isa number
01234      so we leave it to the target.  */
01235 #ifdef CGEN_COMPUTE_MACH
01236   mach = CGEN_COMPUTE_MACH (info);
01237 #else
01238   mach = info->mach;
01239 #endif
01240 
01241 #ifdef CGEN_COMPUTE_ISA
01242   {
01243     static CGEN_BITSET *permanent_isa;
01244 
01245     if (!permanent_isa)
01246       permanent_isa = cgen_bitset_create (MAX_ISAS);
01247     isa = permanent_isa;
01248     cgen_bitset_clear (isa);
01249     cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
01250   }
01251 #else
01252   isa = info->insn_sets;
01253 #endif
01254 
01255   /* If we've switched cpu's, try to find a handle we've used before */
01256   if (cd
01257       && (cgen_bitset_compare (isa, prev_isa) != 0
01258          || mach != prev_mach
01259          || endian != prev_endian))
01260     {
01261       cd = 0;
01262       for (cl = cd_list; cl; cl = cl->next)
01263        {
01264          if (cgen_bitset_compare (cl->isa, isa) == 0 &&
01265              cl->mach == mach &&
01266              cl->endian == endian)
01267            {
01268              cd = cl->cd;
01269              prev_isa = cd->isas;
01270              break;
01271            }
01272        }
01273     } 
01274 
01275   /* If we haven't initialized yet, initialize the opcode table.  */
01276   if (! cd)
01277     {
01278       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
01279       const char *mach_name;
01280 
01281       if (!arch_type)
01282        abort ();
01283       mach_name = arch_type->printable_name;
01284 
01285       prev_isa = cgen_bitset_copy (isa);
01286       prev_mach = mach;
01287       prev_endian = endian;
01288       cd = m32c_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
01289                              CGEN_CPU_OPEN_BFDMACH, mach_name,
01290                              CGEN_CPU_OPEN_ENDIAN, prev_endian,
01291                              CGEN_CPU_OPEN_END);
01292       if (!cd)
01293        abort ();
01294 
01295       /* Save this away for future reference.  */
01296       cl = xmalloc (sizeof (struct cpu_desc_list));
01297       cl->cd = cd;
01298       cl->isa = prev_isa;
01299       cl->mach = mach;
01300       cl->endian = endian;
01301       cl->next = cd_list;
01302       cd_list = cl;
01303 
01304       m32c_cgen_init_dis (cd);
01305     }
01306 
01307   /* We try to have as much common code as possible.
01308      But at this point some targets need to take over.  */
01309   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
01310      but if not possible try to move this hook elsewhere rather than
01311      have two hooks.  */
01312   length = CGEN_PRINT_INSN (cd, pc, info);
01313   if (length > 0)
01314     return length;
01315   if (length < 0)
01316     return -1;
01317 
01318   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
01319   return cd->default_insn_bitsize / 8;
01320 }