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cell-binutils  2.17cvs20070401
ia64-opc-a.c
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00001 /* ia64-opc-a.c -- IA-64 `A' opcode table.
00002    Copyright 1998, 1999, 2000, 2001, 2002, 2004
00003    Free Software Foundation, Inc.
00004    Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
00005 
00006    This file is part of GDB, GAS, and the GNU binutils.
00007 
00008    GDB, GAS, and the GNU binutils are free software; you can redistribute
00009    them and/or modify them under the terms of the GNU General Public
00010    License as published by the Free Software Foundation; either version
00011    2, or (at your option) any later version.
00012 
00013    GDB, GAS, and the GNU binutils are distributed in the hope that they
00014    will be useful, but WITHOUT ANY WARRANTY; without even the implied
00015    warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
00016    the GNU General Public License for more details.
00017 
00018    You should have received a copy of the GNU General Public License
00019    along with this file; see the file COPYING.  If not, write to the
00020    Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00021    02110-1301, USA.  */
00022 
00023 #include "ia64-opc.h"
00024 
00025 #define A     IA64_TYPE_A, 1
00026 #define A2    IA64_TYPE_A, 2
00027 
00028 /* instruction bit fields: */
00029 #define bC(x)        (((ia64_insn) ((x) & 0x1)) << 12)
00030 #define bImm14(x)    ((((ia64_insn) (((x) >>  0) & 0x7f)) << 13) | \
00031                       (((ia64_insn) (((x) >>  7) & 0x3f)) << 27) | \
00032                       (((ia64_insn) (((x) >> 13) & 0x01)) << 36))
00033 #define bR3a(x)             (((ia64_insn) ((x) & 0x7f)) << 20)
00034 #define bR3b(x)             (((ia64_insn) ((x) & 0x3)) << 20)
00035 #define bTa(x)              (((ia64_insn) ((x) & 0x1)) << 33)
00036 #define bTb(x)              (((ia64_insn) ((x) & 0x1)) << 36)
00037 #define bVe(x)              (((ia64_insn) ((x) & 0x1)) << 33)
00038 #define bX(x)        (((ia64_insn) ((x) & 0x1)) << 33)
00039 #define bX2(x)              (((ia64_insn) ((x) & 0x3)) << 34)
00040 #define bX2a(x)             (((ia64_insn) ((x) & 0x3)) << 34)
00041 #define bX2b(x)             (((ia64_insn) ((x) & 0x3)) << 27)
00042 #define bX4(x)              (((ia64_insn) ((x) & 0xf)) << 29)
00043 #define bZa(x)              (((ia64_insn) ((x) & 0x1)) << 36)
00044 #define bZb(x)              (((ia64_insn) ((x) & 0x1)) << 33)
00045 
00046 /* instruction bit masks: */
00047 #define mC    bC (-1)
00048 #define mImm14       bImm14 (-1)
00049 #define mR3a  bR3a (-1)
00050 #define mR3b  bR3b (-1)
00051 #define mTa   bTa (-1)
00052 #define mTb   bTb (-1)
00053 #define mVe   bVe (-1)
00054 #define mX    bX (-1)
00055 #define mX2   bX2 (-1)
00056 #define mX2a  bX2a (-1)
00057 #define mX2b  bX2b (-1)
00058 #define mX4   bX4 (-1)
00059 #define mZa   bZa (-1)
00060 #define mZb   bZb (-1)
00061 
00062 #define OpR3b(a,b)          (bOp (a) | bR3b (b)), (mOp | mR3b)
00063 #define OpX2aVe(a,b,c)             (bOp (a) | bX2a (b) | bVe (c)), \
00064                             (mOp | mX2a | mVe)
00065 #define OpX2aVeR3a(a,b,c,d) (bOp (a) | bX2a (b) | bVe (c) | bR3a (d)), \
00066                             (mOp | mX2a | mVe | mR3a)
00067 #define OpX2aVeImm14(a,b,c,d)      (bOp (a) | bX2a (b) | bVe (c) | bImm14 (d)), \
00068                             (mOp | mX2a | mVe | mImm14)
00069 #define OpX2aVeX4(a,b,c,d)  (bOp (a) | bX2a (b) | bVe (c) | bX4 (d)), \
00070                             (mOp | mX2a | mVe | mX4)
00071 #define OpX2aVeX4X2b(a,b,c,d,e)    \
00072        (bOp (a) | bX2a (b) | bVe (c) | bX4 (d) | bX2b (e)), \
00073        (mOp | mX2a | mVe | mX4 | mX2b)
00074 #define OpX2TbTaC(a,b,c,d,e) \
00075        (bOp (a) | bX2 (b) | bTb (c) | bTa (d) | bC (e)), \
00076        (mOp | mX2 | mTb | mTa | mC)
00077 #define OpX2TaC(a,b,c,d)    (bOp (a) | bX2 (b) | bTa (c) | bC (d)), \
00078                             (mOp | mX2 | mTa | mC)
00079 #define OpX2aZaZbX4(a,b,c,d,e) \
00080        (bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e)), \
00081        (mOp | mX2a | mZa | mZb | mX4)
00082 #define OpX2aZaZbX4X2b(a,b,c,d,e,f) \
00083        (bOp (a) | bX2a (b) | bZa (c) | bZb (d) | bX4 (e) | bX2b (f)), \
00084        (mOp | mX2a | mZa | mZb | mX4 | mX2b)
00085 
00086 /* Used to initialise unused fields in ia64_opcode struct,
00087    in order to stop gcc from complaining.  */
00088 #define EMPTY 0,0,NULL
00089 
00090 struct ia64_opcode ia64_opcodes_a[] =
00091   {
00092     /* A-type instruction encodings (sorted according to major opcode).  */
00093 
00094     {"add",    A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
00095     {"add",    A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}, EMPTY},
00096     {"sub",    A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
00097     {"sub",    A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}, EMPTY},
00098     {"addp4",  A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}, EMPTY},
00099     {"and",    A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}, EMPTY},
00100     {"andcm",  A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}, EMPTY},
00101     {"or",     A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
00102     {"xor",    A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}, EMPTY},
00103     {"shladd",        A, OpX2aVeX4 (8, 0, 0, 4), {R1, R2, CNT2a, R3}, EMPTY},
00104     {"shladdp4", A, OpX2aVeX4 (8, 0, 0, 6), {R1, R2, CNT2a, R3}, EMPTY},
00105     {"sub",    A, OpX2aVeX4X2b (8, 0, 0, 9, 1), {R1, IMM8, R3}, EMPTY},
00106     {"and",    A, OpX2aVeX4X2b (8, 0, 0, 0xb, 0), {R1, IMM8, R3}, EMPTY},
00107     {"andcm",  A, OpX2aVeX4X2b (8, 0, 0, 0xb, 1), {R1, IMM8, R3}, EMPTY},
00108     {"or",     A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}, EMPTY},
00109     {"xor",    A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}, EMPTY},
00110     {"mov",    A, OpX2aVeImm14 (8, 2, 0, 0), {R1, R3}, EMPTY},
00111     /* A mov immediate pseudo for adds was deleted.  It failed for immediate
00112        operands requiring relocs, e.g. @pltoff(a).  */
00113     {"adds",   A, OpX2aVe (8, 2, 0), {R1, IMM14, R3}, EMPTY},
00114     {"addp4",  A, OpX2aVe (8, 3, 0), {R1, IMM14, R3}, EMPTY},
00115     {"padd1",         A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
00116     {"padd2",         A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 0), {R1, R2, R3}, EMPTY},
00117     {"padd4",         A, OpX2aZaZbX4X2b (8, 1, 1, 0, 0, 0), {R1, R2, R3}, EMPTY},
00118     {"padd1.sss",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 1), {R1, R2, R3}, EMPTY},
00119     {"padd2.sss",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 1), {R1, R2, R3}, EMPTY},
00120     {"padd1.uuu",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 2), {R1, R2, R3}, EMPTY},
00121     {"padd2.uuu",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 2), {R1, R2, R3}, EMPTY},
00122     {"padd1.uus",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 3), {R1, R2, R3}, EMPTY},
00123     {"padd2.uus",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 0, 3), {R1, R2, R3}, EMPTY},
00124     {"psub1",         A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 0), {R1, R2, R3}, EMPTY},
00125     {"psub2",         A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 0), {R1, R2, R3}, EMPTY},
00126     {"psub4",         A, OpX2aZaZbX4X2b (8, 1, 1, 0, 1, 0), {R1, R2, R3}, EMPTY},
00127     {"psub1.sss",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
00128     {"psub2.sss",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 1), {R1, R2, R3}, EMPTY},
00129     {"psub1.uuu",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 2), {R1, R2, R3}, EMPTY},
00130     {"psub2.uuu",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 2), {R1, R2, R3}, EMPTY},
00131     {"psub1.uus",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 1, 3), {R1, R2, R3}, EMPTY},
00132     {"psub2.uus",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 1, 3), {R1, R2, R3}, EMPTY},
00133     {"pavg1",         A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 2), {R1, R2, R3}, EMPTY},
00134     {"pavg2",         A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 2), {R1, R2, R3}, EMPTY},
00135     {"pavg1.raz",     A, OpX2aZaZbX4X2b (8, 1, 0, 0, 2, 3), {R1, R2, R3}, EMPTY},
00136     {"pavg2.raz",     A, OpX2aZaZbX4X2b (8, 1, 0, 1, 2, 3), {R1, R2, R3}, EMPTY},
00137     {"pavgsub1",      A, OpX2aZaZbX4X2b (8, 1, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
00138     {"pavgsub2",      A, OpX2aZaZbX4X2b (8, 1, 0, 1, 3, 2), {R1, R2, R3}, EMPTY},
00139     {"pcmp1.eq",      A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 0), {R1, R2, R3}, EMPTY},
00140     {"pcmp2.eq",      A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 0), {R1, R2, R3}, EMPTY},
00141     {"pcmp4.eq",      A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 0), {R1, R2, R3}, EMPTY},
00142     {"pcmp1.gt",      A, OpX2aZaZbX4X2b (8, 1, 0, 0, 9, 1), {R1, R2, R3}, EMPTY},
00143     {"pcmp2.gt",      A, OpX2aZaZbX4X2b (8, 1, 0, 1, 9, 1), {R1, R2, R3}, EMPTY},
00144     {"pcmp4.gt",      A, OpX2aZaZbX4X2b (8, 1, 1, 0, 9, 1), {R1, R2, R3}, EMPTY},
00145     {"pshladd2",      A, OpX2aZaZbX4 (8, 1, 0, 1, 4), {R1, R2, CNT2b, R3}, EMPTY},
00146     {"pshradd2",      A, OpX2aZaZbX4 (8, 1, 0, 1, 6), {R1, R2, CNT2b, R3}, EMPTY},
00147 
00148     {"mov",           A, OpR3b (9, 0), {R1, IMM22}, PSEUDO, 0, NULL},
00149     {"addl",          A, Op    (9),         {R1, IMM22, R3_2}, EMPTY},
00150 
00151     {"cmp.lt",               A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
00152     {"cmp.le",               A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
00153     {"cmp.gt",               A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
00154     {"cmp.ge",               A2, OpX2TbTaC (0xc, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
00155     {"cmp.lt.unc",    A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
00156     {"cmp.le.unc",    A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
00157     {"cmp.gt.unc",    A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
00158     {"cmp.ge.unc",    A2, OpX2TbTaC (0xc, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
00159     {"cmp.eq.and",    A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
00160     {"cmp.ne.andcm",  A2, OpX2TbTaC (0xc, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00161     {"cmp.ne.and",    A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
00162     {"cmp.eq.andcm",  A2, OpX2TbTaC (0xc, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00163     {"cmp4.lt",              A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
00164     {"cmp4.le",              A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
00165     {"cmp4.gt",              A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
00166     {"cmp4.ge",              A2, OpX2TbTaC (0xc, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
00167     {"cmp4.lt.unc",   A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
00168     {"cmp4.le.unc",   A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
00169     {"cmp4.gt.unc",   A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
00170     {"cmp4.ge.unc",   A2, OpX2TbTaC (0xc, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
00171     {"cmp4.eq.and",   A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
00172     {"cmp4.ne.andcm",        A2, OpX2TbTaC (0xc, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00173     {"cmp4.ne.and",   A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
00174     {"cmp4.eq.andcm",        A2, OpX2TbTaC (0xc, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00175     {"cmp.gt.and",    A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
00176     {"cmp.lt.and",    A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00177     {"cmp.le.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00178     {"cmp.ge.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00179     {"cmp.le.and",    A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
00180     {"cmp.ge.and",    A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00181     {"cmp.gt.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00182     {"cmp.lt.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00183     {"cmp.ge.and",    A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
00184     {"cmp.le.and",    A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00185     {"cmp.lt.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00186     {"cmp.gt.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00187     {"cmp.lt.and",    A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
00188     {"cmp.gt.and",    A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00189     {"cmp.ge.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00190     {"cmp.le.andcm",  A2, OpX2TbTaC (0xc, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00191     {"cmp4.gt.and",   A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
00192     {"cmp4.lt.and",   A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00193     {"cmp4.le.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00194     {"cmp4.ge.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00195     {"cmp4.le.and",   A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
00196     {"cmp4.ge.and",   A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00197     {"cmp4.gt.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00198     {"cmp4.lt.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00199     {"cmp4.ge.and",   A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
00200     {"cmp4.le.and",   A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00201     {"cmp4.lt.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00202     {"cmp4.gt.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00203     {"cmp4.lt.and",   A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
00204     {"cmp4.gt.and",   A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00205     {"cmp4.ge.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00206     {"cmp4.le.andcm",        A2, OpX2TbTaC (0xc, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00207     {"cmp.lt",               A2, OpX2TaC   (0xc, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
00208     {"cmp.le",               A2, OpX2TaC   (0xc, 2, 0, 0), {P1, P2, IMM8M1, R3}, EMPTY},
00209     {"cmp.gt",               A2, OpX2TaC   (0xc, 2, 0, 0), {P2, P1, IMM8M1, R3}, EMPTY},
00210     {"cmp.ge",               A2, OpX2TaC   (0xc, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
00211     {"cmp.lt.unc",    A2, OpX2TaC   (0xc, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
00212     {"cmp.le.unc",    A2, OpX2TaC   (0xc, 2, 0, 1), {P1, P2, IMM8M1, R3}, EMPTY},
00213     {"cmp.gt.unc",    A2, OpX2TaC   (0xc, 2, 0, 1), {P2, P1, IMM8M1, R3}, EMPTY},
00214     {"cmp.ge.unc",    A2, OpX2TaC   (0xc, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
00215     {"cmp.eq.and",    A2, OpX2TaC   (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
00216     {"cmp.ne.andcm",  A2, OpX2TaC   (0xc, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00217     {"cmp.ne.and",    A2, OpX2TaC   (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
00218     {"cmp.eq.andcm",  A2, OpX2TaC   (0xc, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00219     {"cmp4.lt",              A2, OpX2TaC   (0xc, 3, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
00220     {"cmp4.le",              A2, OpX2TaC   (0xc, 3, 0, 0), {P1, P2, IMM8M1, R3}, EMPTY},
00221     {"cmp4.gt",              A2, OpX2TaC   (0xc, 3, 0, 0), {P2, P1, IMM8M1, R3}, EMPTY},
00222     {"cmp4.ge",              A2, OpX2TaC   (0xc, 3, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
00223     {"cmp4.lt.unc",   A2, OpX2TaC   (0xc, 3, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
00224     {"cmp4.le.unc",   A2, OpX2TaC   (0xc, 3, 0, 1), {P1, P2, IMM8M1, R3}, EMPTY},
00225     {"cmp4.gt.unc",   A2, OpX2TaC   (0xc, 3, 0, 1), {P2, P1, IMM8M1, R3}, EMPTY},
00226     {"cmp4.ge.unc",   A2, OpX2TaC   (0xc, 3, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
00227     {"cmp4.eq.and",   A2, OpX2TaC   (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
00228     {"cmp4.ne.andcm",        A2, OpX2TaC   (0xc, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00229     {"cmp4.ne.and",   A2, OpX2TaC   (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
00230     {"cmp4.eq.andcm",        A2, OpX2TaC   (0xc, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00231     {"cmp.ltu",              A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
00232     {"cmp.leu",              A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
00233     {"cmp.gtu",              A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
00234     {"cmp.geu",              A2, OpX2TbTaC (0xd, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
00235     {"cmp.ltu.unc",   A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
00236     {"cmp.leu.unc",   A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
00237     {"cmp.gtu.unc",   A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
00238     {"cmp.geu.unc",   A2, OpX2TbTaC (0xd, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
00239     {"cmp.eq.or",     A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
00240     {"cmp.ne.orcm",   A2, OpX2TbTaC (0xd, 0, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00241     {"cmp.ne.or",     A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
00242     {"cmp.eq.orcm",   A2, OpX2TbTaC (0xd, 0, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00243     {"cmp4.ltu",      A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
00244     {"cmp4.leu",      A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R3, R2}, EMPTY},
00245     {"cmp4.gtu",      A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P1, P2, R3, R2}, EMPTY},
00246     {"cmp4.geu",      A2, OpX2TbTaC (0xd, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
00247     {"cmp4.ltu.unc",  A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
00248     {"cmp4.leu.unc",  A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R3, R2}, EMPTY},
00249     {"cmp4.gtu.unc",  A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P1, P2, R3, R2}, EMPTY},
00250     {"cmp4.geu.unc",  A2, OpX2TbTaC (0xd, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
00251     {"cmp4.eq.or",    A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
00252     {"cmp4.ne.orcm",  A2, OpX2TbTaC (0xd, 1, 0, 1, 0), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00253     {"cmp4.ne.or",    A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
00254     {"cmp4.eq.orcm",  A2, OpX2TbTaC (0xd, 1, 0, 1, 1), {P1, P2, R2, R3}, PSEUDO, 0, NULL},
00255     {"cmp.gt.or",     A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
00256     {"cmp.lt.or",     A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00257     {"cmp.le.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00258     {"cmp.ge.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00259     {"cmp.le.or",     A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
00260     {"cmp.ge.or",     A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00261     {"cmp.gt.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00262     {"cmp.lt.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00263     {"cmp.ge.or",     A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
00264     {"cmp.le.or",     A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00265     {"cmp.lt.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00266     {"cmp.gt.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00267     {"cmp.lt.or",     A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
00268     {"cmp.gt.or",     A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00269     {"cmp.ge.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00270     {"cmp.le.orcm",   A2, OpX2TbTaC (0xd, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00271     {"cmp4.gt.or",    A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
00272     {"cmp4.lt.or",    A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00273     {"cmp4.le.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00274     {"cmp4.ge.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00275     {"cmp4.le.or",    A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
00276     {"cmp4.ge.or",    A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00277     {"cmp4.gt.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00278     {"cmp4.lt.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00279     {"cmp4.ge.or",    A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
00280     {"cmp4.le.or",    A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00281     {"cmp4.lt.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00282     {"cmp4.gt.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00283     {"cmp4.lt.or",    A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
00284     {"cmp4.gt.or",    A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00285     {"cmp4.ge.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, GR0, R3}, PSEUDO, 0, NULL},
00286     {"cmp4.le.orcm",  A2, OpX2TbTaC (0xd, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00287     {"cmp.ltu",              A2, OpX2TaC   (0xd, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
00288     {"cmp.leu",              A2, OpX2TaC   (0xd, 2, 0, 0), {P1, P2, IMM8M1U8, R3}, EMPTY},
00289     {"cmp.gtu",              A2, OpX2TaC   (0xd, 2, 0, 0), {P2, P1, IMM8M1U8, R3}, EMPTY},
00290     {"cmp.geu",              A2, OpX2TaC   (0xd, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
00291     {"cmp.ltu.unc",   A2, OpX2TaC   (0xd, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
00292     {"cmp.leu.unc",   A2, OpX2TaC   (0xd, 2, 0, 1), {P1, P2, IMM8M1U8, R3}, EMPTY},
00293     {"cmp.gtu.unc",   A2, OpX2TaC   (0xd, 2, 0, 1), {P2, P1, IMM8M1U8, R3}, EMPTY},
00294     {"cmp.geu.unc",   A2, OpX2TaC   (0xd, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
00295     {"cmp.eq.or",     A2, OpX2TaC   (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
00296     {"cmp.ne.orcm",   A2, OpX2TaC   (0xd, 2, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00297     {"cmp.ne.or",     A2, OpX2TaC   (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
00298     {"cmp.eq.orcm",   A2, OpX2TaC   (0xd, 2, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00299     {"cmp4.ltu",      A2, OpX2TaC   (0xd, 3, 0, 0), {P1, P2, IMM8U4, R3}, EMPTY},
00300     {"cmp4.leu",      A2, OpX2TaC   (0xd, 3, 0, 0), {P1, P2, IMM8M1U4, R3}, EMPTY},
00301     {"cmp4.gtu",      A2, OpX2TaC   (0xd, 3, 0, 0), {P2, P1, IMM8M1U4, R3}, EMPTY},
00302     {"cmp4.geu",      A2, OpX2TaC   (0xd, 3, 0, 0), {P2, P1, IMM8U4, R3}, EMPTY},
00303     {"cmp4.ltu.unc",  A2, OpX2TaC   (0xd, 3, 0, 1), {P1, P2, IMM8U4, R3}, EMPTY},
00304     {"cmp4.leu.unc",  A2, OpX2TaC   (0xd, 3, 0, 1), {P1, P2, IMM8M1U4, R3}, EMPTY},
00305     {"cmp4.gtu.unc",  A2, OpX2TaC   (0xd, 3, 0, 1), {P2, P1, IMM8M1U4, R3}, EMPTY},
00306     {"cmp4.geu.unc",  A2, OpX2TaC   (0xd, 3, 0, 1), {P2, P1, IMM8U4, R3}, EMPTY},
00307     {"cmp4.eq.or",    A2, OpX2TaC   (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
00308     {"cmp4.ne.orcm",  A2, OpX2TaC   (0xd, 3, 1, 0), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00309     {"cmp4.ne.or",    A2, OpX2TaC   (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
00310     {"cmp4.eq.orcm",  A2, OpX2TaC   (0xd, 3, 1, 1), {P1, P2, IMM8, R3}, PSEUDO, 0, NULL},
00311     {"cmp.eq",               A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
00312     {"cmp.ne",               A2, OpX2TbTaC (0xe, 0, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
00313     {"cmp.eq.unc",    A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
00314     {"cmp.ne.unc",    A2, OpX2TbTaC (0xe, 0, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
00315     {"cmp.eq.or.andcm",      A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
00316     {"cmp.ne.and.orcm",      A2, OpX2TbTaC (0xe, 0, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
00317     {"cmp.ne.or.andcm",      A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
00318     {"cmp.eq.and.orcm",      A2, OpX2TbTaC (0xe, 0, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
00319     {"cmp4.eq",              A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P1, P2, R2, R3}, EMPTY},
00320     {"cmp4.ne",              A2, OpX2TbTaC (0xe, 1, 0, 0, 0), {P2, P1, R2, R3}, EMPTY},
00321     {"cmp4.eq.unc",   A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P1, P2, R2, R3}, EMPTY},
00322     {"cmp4.ne.unc",   A2, OpX2TbTaC (0xe, 1, 0, 0, 1), {P2, P1, R2, R3}, EMPTY},
00323     {"cmp4.eq.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P1, P2, R2, R3}, EMPTY},
00324     {"cmp4.ne.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 0), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
00325     {"cmp4.ne.or.andcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P1, P2, R2, R3}, EMPTY},
00326     {"cmp4.eq.and.orcm", A2, OpX2TbTaC (0xe, 1, 0, 1, 1), {P2, P1, R2, R3}, PSEUDO, 0, NULL},
00327     {"cmp.gt.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
00328     {"cmp.lt.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00329     {"cmp.le.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00330     {"cmp.ge.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00331     {"cmp.le.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
00332     {"cmp.ge.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00333     {"cmp.gt.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00334     {"cmp.lt.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00335     {"cmp.ge.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
00336     {"cmp.le.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00337     {"cmp.lt.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00338     {"cmp.gt.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00339     {"cmp.lt.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
00340     {"cmp.gt.or.andcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00341     {"cmp.ge.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00342     {"cmp.le.and.orcm",      A2, OpX2TbTaC (0xe, 0, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00343     {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, GR0, R3}, EMPTY},
00344     {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00345     {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00346     {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00347     {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, GR0, R3}, EMPTY},
00348     {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00349     {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00350     {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 0, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00351     {"cmp4.ge.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, GR0, R3}, EMPTY},
00352     {"cmp4.le.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00353     {"cmp4.lt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00354     {"cmp4.gt.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 0), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00355     {"cmp4.lt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, GR0, R3}, EMPTY},
00356     {"cmp4.gt.or.andcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P1, P2, R3, GR0}, PSEUDO, 0, NULL},
00357     {"cmp4.ge.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, GR0, R3}, PSEUDO, 0, NULL},
00358     {"cmp4.le.and.orcm", A2, OpX2TbTaC (0xe, 1, 1, 1, 1), {P2, P1, R3, GR0}, PSEUDO, 0, NULL},
00359     {"cmp.eq",               A2, OpX2TaC   (0xe, 2, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
00360     {"cmp.ne",               A2, OpX2TaC   (0xe, 2, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
00361     {"cmp.eq.unc",    A2, OpX2TaC   (0xe, 2, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
00362     {"cmp.ne.unc",    A2, OpX2TaC   (0xe, 2, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
00363     {"cmp.eq.or.andcm",      A2, OpX2TaC   (0xe, 2, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
00364     {"cmp.ne.and.orcm",      A2, OpX2TaC   (0xe, 2, 1, 0), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
00365     {"cmp.ne.or.andcm",      A2, OpX2TaC   (0xe, 2, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
00366     {"cmp.eq.and.orcm",      A2, OpX2TaC   (0xe, 2, 1, 1), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
00367     {"cmp4.eq",              A2, OpX2TaC   (0xe, 3, 0, 0), {P1, P2, IMM8, R3}, EMPTY},
00368     {"cmp4.ne",              A2, OpX2TaC   (0xe, 3, 0, 0), {P2, P1, IMM8, R3}, EMPTY},
00369     {"cmp4.eq.unc",   A2, OpX2TaC   (0xe, 3, 0, 1), {P1, P2, IMM8, R3}, EMPTY},
00370     {"cmp4.ne.unc",   A2, OpX2TaC   (0xe, 3, 0, 1), {P2, P1, IMM8, R3}, EMPTY},
00371     {"cmp4.eq.or.andcm", A2, OpX2TaC   (0xe, 3, 1, 0), {P1, P2, IMM8, R3}, EMPTY},
00372     {"cmp4.ne.and.orcm", A2, OpX2TaC   (0xe, 3, 1, 0), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
00373     {"cmp4.ne.or.andcm", A2, OpX2TaC   (0xe, 3, 1, 1), {P1, P2, IMM8, R3}, EMPTY},
00374     {"cmp4.eq.and.orcm", A2, OpX2TaC   (0xe, 3, 1, 1), {P2, P1, IMM8, R3}, PSEUDO, 0, NULL},
00375 
00376     {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
00377   };
00378 
00379 #undef A
00380 #undef A2
00381 #undef bC
00382 #undef bImm14
00383 #undef bR3a
00384 #undef bR3b
00385 #undef bTa
00386 #undef bTb
00387 #undef bVe
00388 #undef bX
00389 #undef bX2
00390 #undef bX2a
00391 #undef bX2b
00392 #undef bX4
00393 #undef bZa
00394 #undef bZb
00395 #undef mC
00396 #undef mImm14
00397 #undef mR3a
00398 #undef mR3b
00399 #undef mTa
00400 #undef mTb
00401 #undef mVe
00402 #undef mX
00403 #undef mX2
00404 #undef mX2a
00405 #undef mX2b
00406 #undef mX4
00407 #undef mZa
00408 #undef mZb
00409 #undef OpR3a
00410 #undef OpR3b
00411 #undef OpX2aVe
00412 #undef OpX2aVeImm14
00413 #undef OpX2aVeX4
00414 #undef OpX2aVeX4X2b
00415 #undef OpX2TbTaC
00416 #undef OpX2TaC
00417 #undef OpX2aZaZbX4
00418 #undef OpX2aZaZbX4X2b
00419 #undef EMPTY