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cell-binutils  2.17cvs20070401
greg-3.d
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00001 #source: greg-1.s
00002 #source: gregget1.s
00003 #source: start.s
00004 #source: a.s
00005 #as: -x
00006 #ld: -m elf64mmix
00007 #objdump: -dt
00008 
00009 # A greg usage with an expanding insn.  The register reloc must be
00010 # evaluated before the expanding reloc.  Here, it doesn't appear in the
00011 # wrong order, and it doesn't seem like they would naturally appear in the
00012 # wrong order, but anyway.
00013 
00014 .*:     file format elf64-mmix
00015 
00016 SYMBOL TABLE:
00017 0+ l    d  \.text    0+ (|\.text)
00018 0+7f0 l    d  \.MMIX\.reg_contents 0+ (|\.MMIX\.reg_contents)
00019 0+10 g       \.text  0+ _start
00020 0+fe g       \*REG\* 0+ areg
00021 #...
00022 0+14 g       \.text  0+ a
00023 
00024 Disassembly of section \.text:
00025 
00026 0+ <_start-0x10>:
00027    0:  e3fe0014      setl \$254,0x14
00028    4:  e6fe0000      incml \$254,0x0
00029    8:  e5fe0000      incmh \$254,0x0
00030    c:  e4fe0000      inch \$254,0x0
00031 
00032 0+10 <_start>:
00033   10:  e3fd0001      setl \$253,0x1
00034 
00035 0+14 <a>:
00036   14:  e3fd0004      setl \$253,0x4