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cell-binutils  2.17cvs20070401
fr450-insn.d
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00001 #as: -mcpu=fr450
00002 #objdump: -dr
00003 
00004 .*:     file format elf32-frv(|fdpic)
00005 
00006 Disassembly of section \.text:
00007 
00008 00000000 <.*>:
00009 #
00010 .*:    80 0d f8 00   lrai gr31,gr0,0x0,0x0,0x0
00011 .*:    be 0c 08 00   lrai gr0,gr31,0x0,0x0,0x0
00012 .*:    80 0c 08 20   lrai gr0,gr0,0x1,0x0,0x0
00013 .*:    80 0c 08 10   lrai gr0,gr0,0x0,0x1,0x0
00014 .*:    80 0c 08 08   lrai gr0,gr0,0x0,0x0,0x1
00015 #
00016 .*:    80 0d f8 40   lrad gr31,gr0,0x0,0x0,0x0
00017 .*:    be 0c 08 40   lrad gr0,gr31,0x0,0x0,0x0
00018 .*:    80 0c 08 60   lrad gr0,gr0,0x1,0x0,0x0
00019 .*:    80 0c 08 50   lrad gr0,gr0,0x0,0x1,0x0
00020 .*:    80 0c 08 48   lrad gr0,gr0,0x0,0x0,0x1
00021 #
00022 .*:    80 0d f9 00   tlbpr gr31,gr0,0x0,0x0
00023 .*:    80 0c 09 1f   tlbpr gr0,gr31,0x0,0x0
00024 .*:    9c 0c 09 00   tlbpr gr0,gr0,0x7,0x0
00025 .*:    82 0c 09 00   tlbpr gr0,gr0,0x0,0x1
00026 #
00027 .*:    81 e1 e4 00   mqlclrhs fr30,fr0,fr0
00028 .*:    81 e0 04 1e   mqlclrhs fr0,fr30,fr0
00029 .*:    bd e0 04 00   mqlclrhs fr0,fr0,fr30
00030 #
00031 .*:    81 e1 e5 00   mqlmths fr30,fr0,fr0
00032 .*:    81 e0 05 1e   mqlmths fr0,fr30,fr0
00033 .*:    bd e0 05 00   mqlmths fr0,fr0,fr30
00034 #
00035 .*:    81 e1 e4 40   mqsllhi fr30,0x0,fr0
00036 .*:    81 e0 04 7f   mqsllhi fr0,0x3f,fr0
00037 .*:    bd e0 04 40   mqsllhi fr0,0x0,fr30
00038 #
00039 .*:    81 e1 e4 c0   mqsrahi fr30,0x0,fr0
00040 .*:    81 e0 04 ff   mqsrahi fr0,0x3f,fr0
00041 .*:    bd e0 04 c0   mqsrahi fr0,0x0,fr30