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cell-binutils  2.17cvs20070401
fdpic-shared-6.d
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00001 #name: FRV uClinux PIC relocs to weak undefined symbols, shared linking
00002 #source: fdpic6.s
00003 #objdump: -DR -j .text -j .data -j .got -j .plt
00004 #ld: -shared --defsym WD1=D6 --version-script fdpic6.ldv
00005 
00006 .*:     file format elf.*frv.*
00007 
00008 Disassembly of section \.plt:
00009 
00010 [0-9a-f ]+<\.plt>:
00011 [0-9a-f ]+:   00 00 00 08   add\.p gr0,gr8,gr0
00012 [0-9a-f ]+:   c0 1a 00 06   bra [0-9a-f]+ <F6-0x10>
00013 [0-9a-f ]+:   00 00 00 00   add\.p gr0,gr0,gr0
00014 [0-9a-f ]+:   c0 1a 00 04   bra [0-9a-f]+ <F6-0x10>
00015 [0-9a-f ]+:   00 00 00 10   add\.p gr0,gr16,gr0
00016 [0-9a-f ]+:   c0 1a 00 02   bra [0-9a-f]+ <F6-0x10>
00017 [0-9a-f ]+:   00 00 00 18   add\.p gr0,gr24,gr0
00018 [0-9a-f ]+:   88 08 f1 40   ldd @\(gr15,gr0\),gr4
00019 [0-9a-f ]+:   80 30 40 00   jmpl @\(gr4,gr0\)
00020 [0-9a-f ]+:   9c cc ff f0   lddi @\(gr15,-16\),gr14
00021 [0-9a-f ]+:   80 30 e0 00   jmpl @\(gr14,gr0\)
00022 Disassembly of section \.text:
00023 
00024 [0-9a-f ]+<F6>:
00025 [0-9a-f ]+:   fe 3f ff fe   call [0-9a-f]+ <F6-0x8>
00026 [0-9a-f ]+:   80 40 f0 0c   addi gr15,12,gr0
00027 [0-9a-f ]+:   80 fc 00 24   setlos 0x24,gr0
00028 [0-9a-f ]+:   80 f4 00 20   setlo 0x20,gr0
00029 [0-9a-f ]+:   80 f8 00 00   sethi hi\(0x0\),gr0
00030 [0-9a-f ]+:   80 40 f0 10   addi gr15,16,gr0
00031 [0-9a-f ]+:   80 fc 00 18   setlos 0x18,gr0
00032 [0-9a-f ]+:   80 f4 00 1c   setlo 0x1c,gr0
00033 [0-9a-f ]+:   80 f8 00 00   sethi hi\(0x0\),gr0
00034 [0-9a-f ]+:   80 40 ff f8   addi gr15,-8,gr0
00035 [0-9a-f ]+:   80 fc ff e8   setlos 0xf*ffffffe8,gr0
00036 [0-9a-f ]+:   80 f4 ff e0   setlo 0xffe0,gr0
00037 [0-9a-f ]+:   80 f8 ff ff   sethi 0xffff,gr0
00038 [0-9a-f ]+:   80 f4 ff d0   setlo 0xffd0,gr0
00039 [0-9a-f ]+:   80 f8 ff ff   sethi 0xffff,gr0
00040 [0-9a-f ]+:   80 f4 00 14   setlo 0x14,gr0
00041 [0-9a-f ]+:   80 f8 00 00   sethi hi\(0x0\),gr0
00042 Disassembly of section \.dat[0-9a-f ]+:
00043 
00044 [0-9a-f ]+<D6>:
00045        \.\.\.
00046 [0-9a-f        ]+: R_FRV_32 WD0
00047 [0-9a-f        ]+: R_FRV_FUNCDESC  WFb
00048 [0-9a-f        ]+: R_FRV_32 WFb
00049 Disassembly of section \.got:
00050 
00051 [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>:
00052 [0-9a-f ]+:   00 00 03 60 .*
00053 [0-9a-f        ]+: R_FRV_FUNCDESC_VALUE   WF9
00054 [0-9a-f ]+:   00 00 00 00 .*
00055 [0-9a-f ]+:   00 00 03 58 .*
00056 [0-9a-f        ]+: R_FRV_FUNCDESC_VALUE   WF8
00057 [0-9a-f ]+:   00 00 00 00 .*
00058 [0-9a-f ]+:   00 00 03 50 .*
00059 [0-9a-f        ]+: R_FRV_FUNCDESC_VALUE   WF0
00060 [0-9a-f ]+:   00 00 00 00 .*
00061 [0-9a-f ]+:   00 00 03 48 .*
00062 [0-9a-f        ]+: R_FRV_FUNCDESC_VALUE   WF7
00063 [0-9a-f ]+:   00 00 00 00 .*
00064 
00065 [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>:
00066        \.\.\.
00067 [0-9a-f        ]+: R_FRV_32 WF1
00068 [0-9a-f        ]+: R_FRV_FUNCDESC  WF4
00069 [0-9a-f        ]+: R_FRV_32 WD2
00070 [0-9a-f        ]+: R_FRV_FUNCDESC  WF5
00071 [0-9a-f        ]+: R_FRV_FUNCDESC  WF6
00072 [0-9a-f        ]+: R_FRV_32 WF3
00073 [0-9a-f        ]+: R_FRV_32 WF2