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cell-binutils  2.17cvs20070401
elf32-msp430.c
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00001 /*  MSP430-specific support for 32-bit ELF
00002     Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007
00003     Free Software Foundation, Inc.
00004     Contributed by Dmitry Diky <diwil@mail.ru>
00005 
00006     This file is part of BFD, the Binary File Descriptor library.
00007 
00008     This program is free software; you can redistribute it and/or modify
00009     it under the terms of the GNU General Public License as published by
00010     the Free Software Foundation; either version 2 of the License, or
00011     (at your option) any later version.
00012 
00013     This program is distributed in the hope that it will be useful,
00014     but WITHOUT ANY WARRANTY; without even the implied warranty of
00015     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00016     GNU General Public License for more details.
00017 
00018     You should have received a copy of the GNU General Public License
00019     along with this program; if not, write to the Free Software
00020     Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00021 
00022 #include "bfd.h"
00023 #include "sysdep.h"
00024 #include "libiberty.h"
00025 #include "libbfd.h"
00026 #include "elf-bfd.h"
00027 #include "elf/msp430.h"
00028 
00029 /* Use RELA instead of REL.  */
00030 #undef USE_REL
00031 
00032 static reloc_howto_type elf_msp430_howto_table[] =
00033 {
00034   HOWTO (R_MSP430_NONE,            /* type */
00035         0,                  /* rightshift */
00036         2,                  /* size (0 = byte, 1 = short, 2 = long) */
00037         32,                 /* bitsize */
00038         FALSE,                     /* pc_relative */
00039         0,                  /* bitpos */
00040         complain_overflow_bitfield,/* complain_on_overflow */
00041         bfd_elf_generic_reloc,     /* special_function */
00042         "R_MSP430_NONE",    /* name */
00043         FALSE,                     /* partial_inplace */
00044         0,                  /* src_mask */
00045         0,                  /* dst_mask */
00046         FALSE),             /* pcrel_offset */
00047 
00048   HOWTO (R_MSP430_32,              /* type */
00049         0,                  /* rightshift */
00050         2,                  /* size (0 = byte, 1 = short, 2 = long) */
00051         32,                 /* bitsize */
00052         FALSE,                     /* pc_relative */
00053         0,                  /* bitpos */
00054         complain_overflow_bitfield,/* complain_on_overflow */
00055         bfd_elf_generic_reloc,     /* special_function */
00056         "R_MSP430_32",             /* name */
00057         FALSE,                     /* partial_inplace */
00058         0xffffffff,         /* src_mask */
00059         0xffffffff,         /* dst_mask */
00060         FALSE),             /* pcrel_offset */
00061 
00062   /* A 13 bit PC relative relocation.  */
00063   HOWTO (R_MSP430_10_PCREL, /* type */
00064         1,                  /* rightshift */
00065         1,                  /* size (0 = byte, 1 = short, 2 = long) */
00066         10,                 /* bitsize */
00067         TRUE,               /* pc_relative */
00068         0,                  /* bitpos */
00069         complain_overflow_bitfield,/* complain_on_overflow */
00070         bfd_elf_generic_reloc,     /* special_function */
00071         "R_MSP430_13_PCREL",       /* name */
00072         FALSE,                     /* partial_inplace */
00073         0xfff,                     /* src_mask */
00074         0xfff,                     /* dst_mask */
00075         TRUE),                     /* pcrel_offset */
00076 
00077   /* A 16 bit absolute relocation.  */
00078   HOWTO (R_MSP430_16,              /* type */
00079         0,                  /* rightshift */
00080         1,                  /* size (0 = byte, 1 = short, 2 = long) */
00081         16,                 /* bitsize */
00082         FALSE,                     /* pc_relative */
00083         0,                  /* bitpos */
00084         complain_overflow_dont,/* complain_on_overflow */
00085         bfd_elf_generic_reloc,     /* special_function */
00086         "R_MSP430_16",             /* name */
00087         FALSE,                     /* partial_inplace */
00088         0,                  /* src_mask */
00089         0xffff,             /* dst_mask */
00090         FALSE),             /* pcrel_offset */
00091 
00092   /* A 16 bit absolute relocation for command address.  */
00093   HOWTO (R_MSP430_16_PCREL, /* type */
00094         1,                  /* rightshift */
00095         1,                  /* size (0 = byte, 1 = short, 2 = long) */
00096         16,                 /* bitsize */
00097         TRUE,               /* pc_relative */
00098         0,                  /* bitpos */
00099         complain_overflow_dont,/* complain_on_overflow */
00100         bfd_elf_generic_reloc,     /* special_function */
00101         "R_MSP430_16_PCREL",       /* name */
00102         FALSE,                     /* partial_inplace */
00103         0,                  /* src_mask */
00104         0xffff,             /* dst_mask */
00105         TRUE),                     /* pcrel_offset */
00106 
00107   /* A 16 bit absolute relocation, byte operations.  */
00108   HOWTO (R_MSP430_16_BYTE,  /* type */
00109         0,                  /* rightshift */
00110         1,                  /* size (0 = byte, 1 = short, 2 = long) */
00111         16,                 /* bitsize */
00112         FALSE,                     /* pc_relative */
00113         0,                  /* bitpos */
00114         complain_overflow_dont,/* complain_on_overflow */
00115         bfd_elf_generic_reloc,     /* special_function */
00116         "R_MSP430_16_BYTE", /* name */
00117         FALSE,                     /* partial_inplace */
00118         0xffff,             /* src_mask */
00119         0xffff,             /* dst_mask */
00120         FALSE),             /* pcrel_offset */
00121 
00122   /* A 16 bit absolute relocation for command address.  */
00123   HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
00124         1,                  /* rightshift */
00125         1,                  /* size (0 = byte, 1 = short, 2 = long) */
00126         16,                 /* bitsize */
00127         TRUE,               /* pc_relative */
00128         0,                  /* bitpos */
00129         complain_overflow_dont,/* complain_on_overflow */
00130         bfd_elf_generic_reloc,     /* special_function */
00131         "R_MSP430_16_PCREL_BYTE",/* name */
00132         FALSE,                     /* partial_inplace */
00133         0xffff,             /* src_mask */
00134         0xffff,             /* dst_mask */
00135         TRUE),                     /* pcrel_offset */
00136 
00137   /* A 13 bit PC relative relocation for complicated polymorphs.  */
00138   HOWTO (R_MSP430_2X_PCREL, /* type */
00139         1,                  /* rightshift */
00140         2,                  /* size (0 = byte, 1 = short, 2 = long) */
00141         10,                 /* bitsize */
00142         TRUE,               /* pc_relative */
00143         0,                  /* bitpos */
00144         complain_overflow_bitfield,/* complain_on_overflow */
00145         bfd_elf_generic_reloc,     /* special_function */
00146         "R_MSP430_2X_PCREL",       /* name */
00147         FALSE,                     /* partial_inplace */
00148         0xfff,                     /* src_mask */
00149         0xfff,                     /* dst_mask */
00150         TRUE),                     /* pcrel_offset */
00151 
00152   /* A 16 bit relaxable relocation for command address.  */
00153   HOWTO (R_MSP430_RL_PCREL, /* type */
00154         1,                  /* rightshift */
00155         1,                  /* size (0 = byte, 1 = short, 2 = long) */
00156         16,                 /* bitsize */
00157         TRUE,               /* pc_relative */
00158         0,                  /* bitpos */
00159         complain_overflow_dont,/* complain_on_overflow */
00160         bfd_elf_generic_reloc,     /* special_function */
00161         "R_MSP430_RL_PCREL",       /* name */
00162         FALSE,                     /* partial_inplace */
00163         0,                  /* src_mask */
00164         0xffff,             /* dst_mask */
00165         TRUE)               /* pcrel_offset */
00166 };
00167 
00168 /* Map BFD reloc types to MSP430 ELF reloc types.  */
00169 
00170 struct msp430_reloc_map
00171 {
00172   bfd_reloc_code_real_type bfd_reloc_val;
00173   unsigned int elf_reloc_val;
00174 };
00175 
00176 static const struct msp430_reloc_map msp430_reloc_map[] =
00177   {
00178     {BFD_RELOC_NONE,                 R_MSP430_NONE},
00179     {BFD_RELOC_32,                   R_MSP430_32},
00180     {BFD_RELOC_MSP430_10_PCREL,      R_MSP430_10_PCREL},
00181     {BFD_RELOC_16,                   R_MSP430_16_BYTE},
00182     {BFD_RELOC_MSP430_16_PCREL,      R_MSP430_16_PCREL},
00183     {BFD_RELOC_MSP430_16,            R_MSP430_16},
00184     {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
00185     {BFD_RELOC_MSP430_16_BYTE,       R_MSP430_16_BYTE},
00186     {BFD_RELOC_MSP430_2X_PCREL,      R_MSP430_2X_PCREL},
00187     {BFD_RELOC_MSP430_RL_PCREL,      R_MSP430_RL_PCREL}
00188   };
00189 
00190 static reloc_howto_type *
00191 bfd_elf32_bfd_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
00192                              bfd_reloc_code_real_type code)
00193 {
00194   unsigned int i;
00195 
00196   for (i = 0; i < ARRAY_SIZE (msp430_reloc_map); i++)
00197     if (msp430_reloc_map[i].bfd_reloc_val == code)
00198       return &elf_msp430_howto_table[msp430_reloc_map[i].elf_reloc_val];
00199 
00200   return NULL;
00201 }
00202 
00203 static reloc_howto_type *
00204 bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
00205                              const char *r_name)
00206 {
00207   unsigned int i;
00208 
00209   for (i = 0;
00210        i < (sizeof (elf_msp430_howto_table)
00211            / sizeof (elf_msp430_howto_table[0]));
00212        i++)
00213     if (elf_msp430_howto_table[i].name != NULL
00214        && strcasecmp (elf_msp430_howto_table[i].name, r_name) == 0)
00215       return &elf_msp430_howto_table[i];
00216 
00217   return NULL;
00218 }
00219 
00220 /* Set the howto pointer for an MSP430 ELF reloc.  */
00221 
00222 static void
00223 msp430_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
00224                         arelent * cache_ptr,
00225                         Elf_Internal_Rela * dst)
00226 {
00227   unsigned int r_type;
00228 
00229   r_type = ELF32_R_TYPE (dst->r_info);
00230   BFD_ASSERT (r_type < (unsigned int) R_MSP430_max);
00231   cache_ptr->howto = &elf_msp430_howto_table[r_type];
00232 }
00233 
00234 /* Look through the relocs for a section during the first phase.
00235    Since we don't do .gots or .plts, we just need to consider the
00236    virtual table relocs for gc.  */
00237 
00238 static bfd_boolean
00239 elf32_msp430_check_relocs (bfd * abfd, struct bfd_link_info * info,
00240                         asection * sec, const Elf_Internal_Rela * relocs)
00241 {
00242   Elf_Internal_Shdr *symtab_hdr;
00243   struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
00244   const Elf_Internal_Rela *rel;
00245   const Elf_Internal_Rela *rel_end;
00246 
00247   if (info->relocatable)
00248     return TRUE;
00249 
00250   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
00251   sym_hashes = elf_sym_hashes (abfd);
00252   sym_hashes_end =
00253       sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
00254   if (!elf_bad_symtab (abfd))
00255     sym_hashes_end -= symtab_hdr->sh_info;
00256 
00257   rel_end = relocs + sec->reloc_count;
00258   for (rel = relocs; rel < rel_end; rel++)
00259     {
00260       struct elf_link_hash_entry *h;
00261       unsigned long r_symndx;
00262 
00263       r_symndx = ELF32_R_SYM (rel->r_info);
00264       if (r_symndx < symtab_hdr->sh_info)
00265        h = NULL;
00266       else
00267        {
00268          h = sym_hashes[r_symndx - symtab_hdr->sh_info];
00269          while (h->root.type == bfd_link_hash_indirect
00270                || h->root.type == bfd_link_hash_warning)
00271            h = (struct elf_link_hash_entry *) h->root.u.i.link;
00272        }
00273     }
00274 
00275   return TRUE;
00276 }
00277 
00278 /* Perform a single relocation.  By default we use the standard BFD
00279    routines, but a few relocs, we have to do them ourselves.  */
00280 
00281 static bfd_reloc_status_type
00282 msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
00283                          asection * input_section, bfd_byte * contents,
00284                          Elf_Internal_Rela * rel, bfd_vma relocation)
00285 {
00286   bfd_reloc_status_type r = bfd_reloc_ok;
00287   bfd_vma x;
00288   bfd_signed_vma srel;
00289 
00290   switch (howto->type)
00291     {
00292     case R_MSP430_10_PCREL:
00293       contents += rel->r_offset;
00294       srel = (bfd_signed_vma) relocation;
00295       srel += rel->r_addend;
00296       srel -= rel->r_offset;
00297       srel -= 2;            /* Branch instructions add 2 to the PC...  */
00298       srel -= (input_section->output_section->vma +
00299               input_section->output_offset);
00300 
00301       if (srel & 1)
00302        return bfd_reloc_outofrange;
00303 
00304       /* MSP430 addresses commands as words.  */
00305       srel >>= 1;
00306 
00307       /* Check for an overflow.  */
00308       if (srel < -512 || srel > 511)
00309        return bfd_reloc_overflow;
00310 
00311       x = bfd_get_16 (input_bfd, contents);
00312       x = (x & 0xfc00) | (srel & 0x3ff);
00313       bfd_put_16 (input_bfd, x, contents);
00314       break;
00315 
00316     case R_MSP430_2X_PCREL:
00317       contents += rel->r_offset;
00318       srel = (bfd_signed_vma) relocation;
00319       srel += rel->r_addend;
00320       srel -= rel->r_offset;
00321       srel -= 2;            /* Branch instructions add 2 to the PC...  */
00322       srel -= (input_section->output_section->vma +
00323               input_section->output_offset);
00324 
00325       if (srel & 1)
00326        return bfd_reloc_outofrange;
00327 
00328       /* MSP430 addresses commands as words.  */
00329       srel >>= 1;
00330 
00331       /* Check for an overflow.  */
00332       if (srel < -512 || srel > 511)
00333        return bfd_reloc_overflow;
00334 
00335       x = bfd_get_16 (input_bfd, contents);
00336       x = (x & 0xfc00) | (srel & 0x3ff);
00337       bfd_put_16 (input_bfd, x, contents);
00338       /* Handle second jump instruction.  */
00339       x = bfd_get_16 (input_bfd, contents - 2);
00340       srel += 1;
00341       x = (x & 0xfc00) | (srel & 0x3ff);
00342       bfd_put_16 (input_bfd, x, contents - 2);
00343       break;
00344 
00345     case R_MSP430_16_PCREL:
00346     case R_MSP430_RL_PCREL:
00347       contents += rel->r_offset;
00348       srel = (bfd_signed_vma) relocation;
00349       srel += rel->r_addend;
00350       srel -= rel->r_offset;
00351       /* Only branch instructions add 2 to the PC...  */
00352       srel -= (input_section->output_section->vma +
00353               input_section->output_offset);
00354 
00355       if (srel & 1)
00356        return bfd_reloc_outofrange;
00357 
00358       bfd_put_16 (input_bfd, srel & 0xffff, contents);
00359       break;
00360 
00361     case R_MSP430_16_PCREL_BYTE:
00362       contents += rel->r_offset;
00363       srel = (bfd_signed_vma) relocation;
00364       srel += rel->r_addend;
00365       srel -= rel->r_offset;
00366       /* Only branch instructions add 2 to the PC...  */
00367       srel -= (input_section->output_section->vma +
00368               input_section->output_offset);
00369 
00370       bfd_put_16 (input_bfd, srel & 0xffff, contents);
00371       break;
00372 
00373     case R_MSP430_16_BYTE:
00374       contents += rel->r_offset;
00375       srel = (bfd_signed_vma) relocation;
00376       srel += rel->r_addend;
00377       bfd_put_16 (input_bfd, srel & 0xffff, contents);
00378       break;
00379 
00380     case R_MSP430_16:
00381       contents += rel->r_offset;
00382       srel = (bfd_signed_vma) relocation;
00383       srel += rel->r_addend;
00384 
00385       if (srel & 1)
00386        return bfd_reloc_notsupported;
00387 
00388       bfd_put_16 (input_bfd, srel & 0xffff, contents);
00389       break;
00390 
00391     default:
00392       r = _bfd_final_link_relocate (howto, input_bfd, input_section,
00393                                 contents, rel->r_offset,
00394                                 relocation, rel->r_addend);
00395     }
00396 
00397   return r;
00398 }
00399 
00400 /* Relocate an MSP430 ELF section.  */
00401 
00402 static bfd_boolean
00403 elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
00404                             struct bfd_link_info * info,
00405                             bfd * input_bfd,
00406                             asection * input_section,
00407                             bfd_byte * contents,
00408                             Elf_Internal_Rela * relocs,
00409                             Elf_Internal_Sym * local_syms,
00410                             asection ** local_sections)
00411 {
00412   Elf_Internal_Shdr *symtab_hdr;
00413   struct elf_link_hash_entry **sym_hashes;
00414   Elf_Internal_Rela *rel;
00415   Elf_Internal_Rela *relend;
00416 
00417   symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
00418   sym_hashes = elf_sym_hashes (input_bfd);
00419   relend = relocs + input_section->reloc_count;
00420 
00421   for (rel = relocs; rel < relend; rel++)
00422     {
00423       reloc_howto_type *howto;
00424       unsigned long r_symndx;
00425       Elf_Internal_Sym *sym;
00426       asection *sec;
00427       struct elf_link_hash_entry *h;
00428       bfd_vma relocation;
00429       bfd_reloc_status_type r;
00430       const char *name = NULL;
00431       int r_type;
00432 
00433       r_type = ELF32_R_TYPE (rel->r_info);
00434       r_symndx = ELF32_R_SYM (rel->r_info);
00435       howto = elf_msp430_howto_table + ELF32_R_TYPE (rel->r_info);
00436       h = NULL;
00437       sym = NULL;
00438       sec = NULL;
00439 
00440       if (r_symndx < symtab_hdr->sh_info)
00441        {
00442          sym = local_syms + r_symndx;
00443          sec = local_sections[r_symndx];
00444          relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
00445 
00446          name = bfd_elf_string_from_elf_section
00447              (input_bfd, symtab_hdr->sh_link, sym->st_name);
00448          name = (name == NULL) ? bfd_section_name (input_bfd, sec) : name;
00449        }
00450       else
00451        {
00452          bfd_boolean unresolved_reloc, warned;
00453 
00454          RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
00455                                r_symndx, symtab_hdr, sym_hashes,
00456                                h, sec, relocation,
00457                                unresolved_reloc, warned);
00458        }
00459 
00460       if (sec != NULL && elf_discarded_section (sec))
00461        {
00462          /* For relocs against symbols from removed linkonce sections,
00463             or sections discarded by a linker script, we just want the
00464             section contents zeroed.  Avoid any special processing.  */
00465          _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
00466          rel->r_info = 0;
00467          rel->r_addend = 0;
00468          continue;
00469        }
00470 
00471       if (info->relocatable)
00472        continue;
00473 
00474       r = msp430_final_link_relocate (howto, input_bfd, input_section,
00475                                   contents, rel, relocation);
00476 
00477       if (r != bfd_reloc_ok)
00478        {
00479          const char *msg = (const char *) NULL;
00480 
00481          switch (r)
00482            {
00483            case bfd_reloc_overflow:
00484              r = info->callbacks->reloc_overflow
00485                 (info, (h ? &h->root : NULL), name, howto->name,
00486                  (bfd_vma) 0, input_bfd, input_section,
00487                  rel->r_offset);
00488              break;
00489 
00490            case bfd_reloc_undefined:
00491              r = info->callbacks->undefined_symbol
00492                 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
00493              break;
00494 
00495            case bfd_reloc_outofrange:
00496              msg = _("internal error: out of range error");
00497              break;
00498 
00499            case bfd_reloc_notsupported:
00500              msg = _("internal error: unsupported relocation error");
00501              break;
00502 
00503            case bfd_reloc_dangerous:
00504              msg = _("internal error: dangerous relocation");
00505              break;
00506 
00507            default:
00508              msg = _("internal error: unknown error");
00509              break;
00510            }
00511 
00512          if (msg)
00513            r = info->callbacks->warning
00514               (info, msg, name, input_bfd, input_section, rel->r_offset);
00515 
00516          if (!r)
00517            return FALSE;
00518        }
00519 
00520     }
00521 
00522   return TRUE;
00523 }
00524 
00525 /* The final processing done just before writing out a MSP430 ELF object
00526    file.  This gets the MSP430 architecture right based on the machine
00527    number.  */
00528 
00529 static void
00530 bfd_elf_msp430_final_write_processing (bfd * abfd,
00531                                    bfd_boolean linker ATTRIBUTE_UNUSED)
00532 {
00533   unsigned long val;
00534 
00535   switch (bfd_get_mach (abfd))
00536     {
00537     default:
00538     case bfd_mach_msp110:
00539       val = E_MSP430_MACH_MSP430x11x1;
00540       break;
00541 
00542     case bfd_mach_msp11:
00543       val = E_MSP430_MACH_MSP430x11;
00544       break;
00545 
00546     case bfd_mach_msp12:
00547       val = E_MSP430_MACH_MSP430x12;
00548       break;
00549 
00550     case bfd_mach_msp13:
00551       val = E_MSP430_MACH_MSP430x13;
00552       break;
00553 
00554     case bfd_mach_msp14:
00555       val = E_MSP430_MACH_MSP430x14;
00556       break;
00557 
00558     case bfd_mach_msp15:
00559       val = E_MSP430_MACH_MSP430x15;
00560       break;
00561 
00562     case bfd_mach_msp16:
00563       val = E_MSP430_MACH_MSP430x16;
00564       break;
00565 
00566     case bfd_mach_msp31:
00567       val = E_MSP430_MACH_MSP430x31;
00568       break;
00569 
00570     case bfd_mach_msp32:
00571       val = E_MSP430_MACH_MSP430x32;
00572       break;
00573 
00574     case bfd_mach_msp33:
00575       val = E_MSP430_MACH_MSP430x33;
00576       break;
00577 
00578     case bfd_mach_msp41:
00579       val = E_MSP430_MACH_MSP430x41;
00580       break;
00581 
00582     case bfd_mach_msp42:
00583       val = E_MSP430_MACH_MSP430x42;
00584       break;
00585 
00586     case bfd_mach_msp43:
00587       val = E_MSP430_MACH_MSP430x43;
00588       break;
00589 
00590     case bfd_mach_msp44:
00591       val = E_MSP430_MACH_MSP430x44;
00592       break;
00593     }
00594 
00595   elf_elfheader (abfd)->e_machine = EM_MSP430;
00596   elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
00597   elf_elfheader (abfd)->e_flags |= val;
00598 }
00599 
00600 /* Set the right machine number.  */
00601 
00602 static bfd_boolean
00603 elf32_msp430_object_p (bfd * abfd)
00604 {
00605   int e_set = bfd_mach_msp14;
00606 
00607   if (elf_elfheader (abfd)->e_machine == EM_MSP430
00608       || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
00609     {
00610       int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
00611 
00612       switch (e_mach)
00613        {
00614        default:
00615        case E_MSP430_MACH_MSP430x11:
00616          e_set = bfd_mach_msp11;
00617          break;
00618 
00619        case E_MSP430_MACH_MSP430x11x1:
00620          e_set = bfd_mach_msp110;
00621          break;
00622 
00623        case E_MSP430_MACH_MSP430x12:
00624          e_set = bfd_mach_msp12;
00625          break;
00626 
00627        case E_MSP430_MACH_MSP430x13:
00628          e_set = bfd_mach_msp13;
00629          break;
00630 
00631        case E_MSP430_MACH_MSP430x14:
00632          e_set = bfd_mach_msp14;
00633          break;
00634 
00635        case E_MSP430_MACH_MSP430x15:
00636          e_set = bfd_mach_msp15;
00637          break;
00638 
00639        case E_MSP430_MACH_MSP430x16:
00640          e_set = bfd_mach_msp16;
00641          break;
00642 
00643        case E_MSP430_MACH_MSP430x31:
00644          e_set = bfd_mach_msp31;
00645          break;
00646 
00647        case E_MSP430_MACH_MSP430x32:
00648          e_set = bfd_mach_msp32;
00649          break;
00650 
00651        case E_MSP430_MACH_MSP430x33:
00652          e_set = bfd_mach_msp33;
00653          break;
00654 
00655        case E_MSP430_MACH_MSP430x41:
00656          e_set = bfd_mach_msp41;
00657          break;
00658 
00659        case E_MSP430_MACH_MSP430x42:
00660          e_set = bfd_mach_msp42;
00661          break;
00662 
00663        case E_MSP430_MACH_MSP430x43:
00664          e_set = bfd_mach_msp43;
00665          break;
00666 
00667        case E_MSP430_MACH_MSP430x44:
00668          e_set = bfd_mach_msp44;
00669          break;
00670        }
00671     }
00672 
00673   return bfd_default_set_arch_mach (abfd, bfd_arch_msp430, e_set);
00674 }
00675 
00676 /* These functions handle relaxing for the msp430.
00677    Relaxation required only in two cases:
00678     - Bad hand coding like jumps from one section to another or
00679       from file to file.
00680     - Sibling calls. This will affect onlu 'jump label' polymorph. Without
00681       relaxing this enlarges code by 2 bytes. Sibcalls implemented but
00682       do not work in gcc's port by the reason I do not know.
00683    Anyway, if a relaxation required, user should pass -relax option to the
00684    linker.
00685 
00686    There are quite a few relaxing opportunities available on the msp430:
00687 
00688    ================================================================
00689 
00690    1. 3 words -> 1 word
00691 
00692    eq      ==      jeq label              jne +4; br lab
00693    ne      !=      jne label              jeq +4; br lab
00694    lt      <       jl  label              jge +4; br lab
00695    ltu     <       jlo label              lhs +4; br lab
00696    ge      >=      jge label              jl  +4; br lab
00697    geu     >=      jhs label              jlo +4; br lab
00698 
00699    2. 4 words -> 1 word
00700 
00701    ltn     <       jn                      jn  +2; jmp +4; br lab
00702 
00703    3. 4 words -> 2 words
00704 
00705    gt      >       jeq +2; jge label       jeq +6; jl  +4; br label
00706    gtu     >       jeq +2; jhs label       jeq +6; jlo +4; br label
00707 
00708    4. 4 words -> 2 words and 2 labels
00709 
00710    leu     <=      jeq label; jlo label    jeq +2; jhs +4; br label
00711    le      <=      jeq label; jl  label    jeq +2; jge +4; br label
00712    =================================================================
00713 
00714    codemap for first cases is (labels masked ):
00715              eq:     0x2002,0x4010,0x0000 -> 0x2400
00716              ne:     0x2402,0x4010,0x0000 -> 0x2000
00717              lt:     0x3402,0x4010,0x0000 -> 0x3800
00718              ltu:    0x2c02,0x4010,0x0000 -> 0x2800
00719              ge:     0x3802,0x4010,0x0000 -> 0x3400
00720              geu:    0x2802,0x4010,0x0000 -> 0x2c00
00721 
00722   second case:
00723              ltn:    0x3001,0x3c02,0x4010,0x0000 -> 0x3000
00724 
00725   third case:
00726              gt:     0x2403,0x3802,0x4010,0x0000 -> 0x2401,0x3400
00727              gtu:    0x2403,0x2802,0x4010,0x0000 -> 0x2401,0x2c00
00728 
00729   fourth case:
00730              leu:    0x2401,0x2c02,0x4010,0x0000 -> 0x2400,0x2800
00731              le:     0x2401,0x3402,0x4010,0x0000 -> 0x2400,0x3800
00732 
00733   Unspecified case :)
00734              jump:   0x4010,0x0000 -> 0x3c00.  */
00735 
00736 #define NUMB_RELAX_CODES    12
00737 static struct rcodes_s
00738 {
00739   int f0, f1;               /* From code.  */
00740   int t0, t1;               /* To code.  */
00741   int labels;               /* Position of labels: 1 - one label at first
00742                                word, 2 - one at second word, 3 - two
00743                                labels at both.  */
00744   int cdx;                  /* Words to match.  */
00745   int bs;                   /* Shrink bytes.  */
00746   int off;                  /* Offset from old label for new code.  */
00747   int ncl;                  /* New code length.  */
00748 } rcode[] =
00749 {/*                               lab,cdx,bs,off,ncl */
00750   { 0x0000, 0x0000, 0x3c00, 0x0000, 1, 0, 2, 2,   2},   /* jump */
00751   { 0x0000, 0x2002, 0x2400, 0x0000, 1, 1, 4, 4,   2},   /* eq */
00752   { 0x0000, 0x2402, 0x2000, 0x0000, 1, 1, 4, 4,   2},   /* ne */
00753   { 0x0000, 0x3402, 0x3800, 0x0000, 1, 1, 4, 4,   2},   /* lt */
00754   { 0x0000, 0x2c02, 0x2800, 0x0000, 1, 1, 4, 4,   2},   /* ltu */
00755   { 0x0000, 0x3802, 0x3400, 0x0000, 1, 1, 4, 4,   2},   /* ge */
00756   { 0x0000, 0x2802, 0x2c00, 0x0000, 1, 1, 4, 4,   2},   /* geu */
00757   { 0x3001, 0x3c02, 0x3000, 0x0000, 1, 2, 6, 6,   2},   /* ltn */
00758   { 0x2403, 0x3802, 0x2401, 0x3400, 2, 2, 4, 6,   4},   /* gt */
00759   { 0x2403, 0x2802, 0x2401, 0x2c00, 2, 2, 4, 6,   4},   /* gtu */
00760   { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6,   4},   /* leu , 2 labels */
00761   { 0x2401, 0x2c02, 0x2400, 0x2800, 3, 2, 4, 6,   4},   /* le  , 2 labels */
00762   { 0,            0,            0,            0,            0, 0, 0, 0,  0}
00763 };
00764 
00765 /* Return TRUE if a symbol exists at the given address.  */
00766 
00767 static bfd_boolean
00768 msp430_elf_symbol_address_p (bfd * abfd,
00769                           asection * sec,
00770                           Elf_Internal_Sym * isym,
00771                           bfd_vma addr)
00772 {
00773   Elf_Internal_Shdr *symtab_hdr;
00774   unsigned int sec_shndx;
00775   Elf_Internal_Sym *isymend;
00776   struct elf_link_hash_entry **sym_hashes;
00777   struct elf_link_hash_entry **end_hashes;
00778   unsigned int symcount;
00779 
00780   sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
00781 
00782   /* Examine all the local symbols.  */
00783   symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
00784   for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
00785     if (isym->st_shndx == sec_shndx && isym->st_value == addr)
00786       return TRUE;
00787 
00788   symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
00789              - symtab_hdr->sh_info);
00790   sym_hashes = elf_sym_hashes (abfd);
00791   end_hashes = sym_hashes + symcount;
00792   for (; sym_hashes < end_hashes; sym_hashes++)
00793     {
00794       struct elf_link_hash_entry *sym_hash = *sym_hashes;
00795 
00796       if ((sym_hash->root.type == bfd_link_hash_defined
00797           || sym_hash->root.type == bfd_link_hash_defweak)
00798          && sym_hash->root.u.def.section == sec
00799          && sym_hash->root.u.def.value == addr)
00800        return TRUE;
00801     }
00802 
00803   return FALSE;
00804 }
00805 
00806 /* Adjust all local symbols defined as '.section + 0xXXXX' (.section has sec_shndx)
00807     referenced from current and other sections */
00808 static bfd_boolean
00809 msp430_elf_relax_adjust_locals(bfd * abfd, asection * sec, bfd_vma addr,
00810     int count, unsigned int sec_shndx, bfd_vma toaddr)
00811 {
00812   Elf_Internal_Shdr *symtab_hdr;
00813   Elf_Internal_Rela *irel;
00814   Elf_Internal_Rela *irelend;
00815   Elf_Internal_Sym *isym;
00816 
00817   irel = elf_section_data (sec)->relocs;
00818   irelend = irel + sec->reloc_count;
00819   symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
00820   isym = (Elf_Internal_Sym *) symtab_hdr->contents;
00821   
00822   for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
00823     {
00824       int sidx = ELF32_R_SYM(irel->r_info);
00825       Elf_Internal_Sym *lsym = isym + sidx;
00826       
00827       /* Adjust symbols referenced by .sec+0xXX */
00828       if (irel->r_addend > addr && irel->r_addend < toaddr 
00829          && lsym->st_shndx == sec_shndx)
00830        irel->r_addend -= count;
00831     }
00832   
00833   return TRUE;
00834 }
00835 
00836 /* Delete some bytes from a section while relaxing.  */
00837 
00838 static bfd_boolean
00839 msp430_elf_relax_delete_bytes (bfd * abfd, asection * sec, bfd_vma addr,
00840                             int count)
00841 {
00842   Elf_Internal_Shdr *symtab_hdr;
00843   unsigned int sec_shndx;
00844   bfd_byte *contents;
00845   Elf_Internal_Rela *irel;
00846   Elf_Internal_Rela *irelend;
00847   Elf_Internal_Rela *irelalign;
00848   bfd_vma toaddr;
00849   Elf_Internal_Sym *isym;
00850   Elf_Internal_Sym *isymend;
00851   struct elf_link_hash_entry **sym_hashes;
00852   struct elf_link_hash_entry **end_hashes;
00853   unsigned int symcount;
00854   asection *p;
00855 
00856   sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
00857 
00858   contents = elf_section_data (sec)->this_hdr.contents;
00859 
00860   /* The deletion must stop at the next ALIGN reloc for an aligment
00861      power larger than the number of bytes we are deleting.  */
00862 
00863   irelalign = NULL;
00864   toaddr = sec->size;
00865 
00866   irel = elf_section_data (sec)->relocs;
00867   irelend = irel + sec->reloc_count;
00868 
00869   /* Actually delete the bytes.  */
00870   memmove (contents + addr, contents + addr + count,
00871           (size_t) (toaddr - addr - count));
00872   sec->size -= count;
00873 
00874   /* Adjust all the relocs.  */
00875   symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
00876   isym = (Elf_Internal_Sym *) symtab_hdr->contents;
00877   for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
00878     {
00879       /* Get the new reloc address.  */
00880       if ((irel->r_offset > addr && irel->r_offset < toaddr))
00881        irel->r_offset -= count;
00882     }
00883 
00884   for (p = abfd->sections; p != NULL; p = p->next)
00885     msp430_elf_relax_adjust_locals(abfd,p,addr,count,sec_shndx,toaddr);
00886   
00887   /* Adjust the local symbols defined in this section.  */
00888   symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
00889   isym = (Elf_Internal_Sym *) symtab_hdr->contents;
00890   for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
00891     if (isym->st_shndx == sec_shndx
00892        && isym->st_value > addr && isym->st_value < toaddr)
00893       isym->st_value -= count;
00894 
00895   /* Now adjust the global symbols defined in this section.  */
00896   symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
00897              - symtab_hdr->sh_info);
00898   sym_hashes = elf_sym_hashes (abfd);
00899   end_hashes = sym_hashes + symcount;
00900   for (; sym_hashes < end_hashes; sym_hashes++)
00901     {
00902       struct elf_link_hash_entry *sym_hash = *sym_hashes;
00903 
00904       if ((sym_hash->root.type == bfd_link_hash_defined
00905           || sym_hash->root.type == bfd_link_hash_defweak)
00906          && sym_hash->root.u.def.section == sec
00907          && sym_hash->root.u.def.value > addr
00908          && sym_hash->root.u.def.value < toaddr)
00909        sym_hash->root.u.def.value -= count;
00910     }
00911 
00912   return TRUE;
00913 }
00914 
00915 
00916 static bfd_boolean
00917 msp430_elf_relax_section (bfd * abfd, asection * sec,
00918                        struct bfd_link_info * link_info,
00919                        bfd_boolean * again)
00920 {
00921   Elf_Internal_Shdr * symtab_hdr;
00922   Elf_Internal_Rela * internal_relocs;
00923   Elf_Internal_Rela * irel;
00924   Elf_Internal_Rela * irelend;
00925   bfd_byte *          contents = NULL;
00926   Elf_Internal_Sym *  isymbuf = NULL;
00927 
00928   /* Assume nothing changes.  */
00929   *again = FALSE;
00930 
00931   /* We don't have to do anything for a relocatable link, if
00932      this section does not have relocs, or if this is not a
00933      code section.  */
00934   if (link_info->relocatable
00935       || (sec->flags & SEC_RELOC) == 0
00936       || sec->reloc_count == 0 || (sec->flags & SEC_CODE) == 0)
00937     return TRUE;
00938 
00939   symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
00940 
00941   /* Get a copy of the native relocations.  */
00942   internal_relocs =
00943     _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, link_info->keep_memory);
00944   if (internal_relocs == NULL)
00945     goto error_return;
00946 
00947   /* Walk through them looking for relaxing opportunities.  */
00948   irelend = internal_relocs + sec->reloc_count;
00949   for (irel = internal_relocs; irel < irelend; irel++)
00950     {
00951       bfd_vma symval;
00952 
00953       /* If this isn't something that can be relaxed, then ignore
00954          this reloc.  */
00955       if (ELF32_R_TYPE (irel->r_info) != (int) R_MSP430_RL_PCREL)
00956        continue;
00957 
00958       /* Get the section contents if we haven't done so already.  */
00959       if (contents == NULL)
00960        {
00961          /* Get cached copy if it exists.  */
00962          if (elf_section_data (sec)->this_hdr.contents != NULL)
00963            contents = elf_section_data (sec)->this_hdr.contents;
00964          else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
00965            goto error_return;
00966        }
00967 
00968       /* Read this BFD's local symbols if we haven't done so already.  */
00969       if (isymbuf == NULL && symtab_hdr->sh_info != 0)
00970        {
00971          isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
00972          if (isymbuf == NULL)
00973            isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
00974                                        symtab_hdr->sh_info, 0,
00975                                        NULL, NULL, NULL);
00976          if (isymbuf == NULL)
00977            goto error_return;
00978        }
00979 
00980       /* Get the value of the symbol referred to by the reloc.  */
00981       if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
00982        {
00983          /* A local symbol.  */
00984          Elf_Internal_Sym *isym;
00985          asection *sym_sec;
00986 
00987          isym = isymbuf + ELF32_R_SYM (irel->r_info);
00988          if (isym->st_shndx == SHN_UNDEF)
00989            sym_sec = bfd_und_section_ptr;
00990          else if (isym->st_shndx == SHN_ABS)
00991            sym_sec = bfd_abs_section_ptr;
00992          else if (isym->st_shndx == SHN_COMMON)
00993            sym_sec = bfd_com_section_ptr;
00994          else
00995            sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
00996          symval = (isym->st_value
00997                   + sym_sec->output_section->vma + sym_sec->output_offset);
00998        }
00999       else
01000        {
01001          unsigned long indx;
01002          struct elf_link_hash_entry *h;
01003 
01004          /* An external symbol.  */
01005          indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
01006          h = elf_sym_hashes (abfd)[indx];
01007          BFD_ASSERT (h != NULL);
01008 
01009          if (h->root.type != bfd_link_hash_defined
01010              && h->root.type != bfd_link_hash_defweak)
01011            /* This appears to be a reference to an undefined
01012               symbol.  Just ignore it--it will be caught by the
01013               regular reloc processing.  */
01014            continue;
01015 
01016          symval = (h->root.u.def.value
01017                   + h->root.u.def.section->output_section->vma
01018                   + h->root.u.def.section->output_offset);
01019        }
01020 
01021       /* For simplicity of coding, we are going to modify the section
01022          contents, the section relocs, and the BFD symbol table.  We
01023          must tell the rest of the code not to free up this
01024          information.  It would be possible to instead create a table
01025          of changes which have to be made, as is done in coff-mips.c;
01026          that would be more work, but would require less memory when
01027          the linker is run.  */
01028 
01029       /* Try to turn a 16bit pc-relative branch into a 10bit pc-relative
01030          branch.  */
01031       /* Paranoia? paranoia...  */      
01032       if (ELF32_R_TYPE (irel->r_info) == (int) R_MSP430_RL_PCREL)
01033        {
01034          bfd_vma value = symval;
01035 
01036          /* Deal with pc-relative gunk.  */
01037          value -= (sec->output_section->vma + sec->output_offset);
01038          value -= irel->r_offset;
01039          value += irel->r_addend;
01040 
01041          /* See if the value will fit in 10 bits, note the high value is
01042             1016 as the target will be two bytes closer if we are
01043             able to relax. */
01044          if ((long) value < 1016 && (long) value > -1016)
01045            {
01046              int code0 = 0, code1 = 0, code2 = 0;
01047              int i;
01048              struct rcodes_s *rx;
01049 
01050              /* Get the opcode.  */
01051              if (irel->r_offset >= 6)
01052               code0 = bfd_get_16 (abfd, contents + irel->r_offset - 6);
01053 
01054              if (irel->r_offset >= 4)
01055               code1 = bfd_get_16 (abfd, contents + irel->r_offset - 4);
01056 
01057              code2 = bfd_get_16 (abfd, contents + irel->r_offset - 2);
01058 
01059              if (code2 != 0x4010)
01060               continue;
01061 
01062              /* Check r4 and r3.  */
01063              for (i = NUMB_RELAX_CODES - 1; i >= 0; i--)
01064               {
01065                 rx = &rcode[i];
01066                 if (rx->cdx == 2 && rx->f0 == code0 && rx->f1 == code1)
01067                   break;
01068                 else if (rx->cdx == 1 && rx->f1 == code1)
01069                   break;
01070                 else if (rx->cdx == 0)    /* This is an unconditional jump.  */
01071                   break;
01072               }
01073 
01074              /* Check labels:
01075                  .Label0:       ; we do not care about this label
01076                     jeq    +6
01077                  .Label1:       ; make sure there is no label here
01078                     jl     +4
01079                  .Label2:       ; make sure there is no label here
01080                     br .Label_dst
01081 
01082                 So, if there is .Label1 or .Label2 we cannot relax this code.
01083                 This actually should not happen, cause for relaxable
01084                instructions we use RL_PCREL reloc instead of 16_PCREL.
01085                Will change this in the future. */
01086 
01087              if (rx->cdx > 0
01088                 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
01089                                             irel->r_offset - 2))
01090               continue;
01091              if (rx->cdx > 1
01092                 && msp430_elf_symbol_address_p (abfd, sec, isymbuf,
01093                                             irel->r_offset - 4))
01094               continue;
01095 
01096              /* Note that we've changed the relocs, section contents, etc.  */
01097              elf_section_data (sec)->relocs = internal_relocs;
01098              elf_section_data (sec)->this_hdr.contents = contents;
01099              symtab_hdr->contents = (unsigned char *) isymbuf;
01100 
01101              /* Fix the relocation's type.  */
01102              if (rx->labels == 3)  /* Handle special cases.  */
01103               irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
01104                                       R_MSP430_2X_PCREL);
01105              else
01106               irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
01107                                       R_MSP430_10_PCREL);
01108 
01109              /* Fix the opcode right way.  */
01110              bfd_put_16 (abfd, rx->t0, contents + irel->r_offset - rx->off);
01111              if (rx->t1)
01112               bfd_put_16 (abfd, rx->t1,
01113                          contents + irel->r_offset - rx->off + 2);
01114 
01115              /* Delete bytes. */
01116              if (!msp430_elf_relax_delete_bytes (abfd, sec,
01117                                             irel->r_offset - rx->off +
01118                                             rx->ncl, rx->bs))
01119               goto error_return;
01120 
01121              /* Handle unconditional jumps.  */
01122              if (rx->cdx == 0)
01123               irel->r_offset -= 2;
01124 
01125              /* That will change things, so, we should relax again.
01126                 Note that this is not required, and it may be slow.  */
01127              *again = TRUE;
01128            }
01129        }
01130     }
01131 
01132   if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
01133     {
01134       if (!link_info->keep_memory)
01135        free (isymbuf);
01136       else
01137        {
01138          /* Cache the symbols for elf_link_input_bfd.  */
01139          symtab_hdr->contents = (unsigned char *) isymbuf;
01140        }
01141     }
01142 
01143   if (contents != NULL
01144       && elf_section_data (sec)->this_hdr.contents != contents)
01145     {
01146       if (!link_info->keep_memory)
01147        free (contents);
01148       else
01149        {
01150          /* Cache the section contents for elf_link_input_bfd.  */
01151          elf_section_data (sec)->this_hdr.contents = contents;
01152        }
01153     }
01154 
01155   if (internal_relocs != NULL
01156       && elf_section_data (sec)->relocs != internal_relocs)
01157     free (internal_relocs);
01158 
01159   return TRUE;
01160 
01161 error_return:
01162   if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
01163     free (isymbuf);
01164   if (contents != NULL
01165       && elf_section_data (sec)->this_hdr.contents != contents)
01166     free (contents);
01167   if (internal_relocs != NULL
01168       && elf_section_data (sec)->relocs != internal_relocs)
01169     free (internal_relocs);
01170 
01171   return FALSE;
01172 }
01173 
01174 
01175 #define ELF_ARCH            bfd_arch_msp430
01176 #define ELF_MACHINE_CODE    EM_MSP430
01177 #define ELF_MACHINE_ALT1    EM_MSP430_OLD
01178 #define ELF_MAXPAGESIZE            1
01179 #define       ELF_OSABI            ELFOSABI_STANDALONE
01180 
01181 #define TARGET_LITTLE_SYM       bfd_elf32_msp430_vec
01182 #define TARGET_LITTLE_NAME  "elf32-msp430"
01183 
01184 #define elf_info_to_howto                msp430_info_to_howto_rela
01185 #define elf_info_to_howto_rel                   NULL
01186 #define elf_backend_relocate_section         elf32_msp430_relocate_section
01187 #define elf_backend_check_relocs             elf32_msp430_check_relocs
01188 #define elf_backend_can_gc_sections          1
01189 #define elf_backend_final_write_processing   bfd_elf_msp430_final_write_processing
01190 #define elf_backend_object_p                   elf32_msp430_object_p
01191 #define elf_backend_post_process_headers     _bfd_elf_set_osabi
01192 #define bfd_elf32_bfd_relax_section            msp430_elf_relax_section
01193 
01194 #include "elf32-target.h"