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cell-binutils  2.17cvs20070401
elf-rel5.d
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00001 #objdump: -dr --prefix-addresses --show-raw-insn
00002 #name: MIPS ELF reloc 5
00003 #as: -32
00004 
00005 .*: +file format elf.*mips.*
00006 
00007 Disassembly of section \.text:
00008 0+000000 <[^>]*> 3c050000   lui    a1,0x0
00009 [      ]*0: R_MIPS_HI16     dg1
00010 0+000004 <[^>]*> [26]4a50000       (|d)addiu     a1,a1,0
00011 [      ]*4: R_MIPS_LO16     dg1
00012 0+000008 <[^>]*> 3c050000   lui    a1,0x0
00013 [      ]*8: R_MIPS_HI16     dg1
00014 0+00000c <[^>]*> [26]4a5000c       (|d)addiu     a1,a1,12
00015 [      ]*c: R_MIPS_LO16     dg1
00016 0+000010 <[^>]*> 3c050000   lui    a1,0x0
00017 [      ]*10: R_MIPS_HI16    dg1
00018 0+000014 <[^>]*> [26]4a50000       (|d)addiu     a1,a1,0
00019 [      ]*14: R_MIPS_LO16    dg1
00020 0+000018 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00021 0+00001c <[^>]*> 3c050000   lui    a1,0x0
00022 [      ]*1c: R_MIPS_HI16    dg1
00023 0+000020 <[^>]*> [26]4a5000c       (|d)addiu     a1,a1,12
00024 [      ]*20: R_MIPS_LO16    dg1
00025 0+000024 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00026 0+000028 <[^>]*> 3c050000   lui    a1,0x0
00027 [      ]*28: R_MIPS_HI16    dg1
00028 0+00002c <[^>]*> 8ca50000   lw     a1,0\(a1\)
00029 [      ]*2c: R_MIPS_LO16    dg1
00030 0+000030 <[^>]*> 3c050000   lui    a1,0x0
00031 [      ]*30: R_MIPS_HI16    dg1
00032 0+000034 <[^>]*> 8ca5000c   lw     a1,12\(a1\)
00033 [      ]*34: R_MIPS_LO16    dg1
00034 0+000038 <[^>]*> 3c050000   lui    a1,0x0
00035 [      ]*38: R_MIPS_HI16    dg1
00036 0+00003c <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00037 0+000040 <[^>]*> 8ca50000   lw     a1,0\(a1\)
00038 [      ]*40: R_MIPS_LO16    dg1
00039 0+000044 <[^>]*> 3c050000   lui    a1,0x0
00040 [      ]*44: R_MIPS_HI16    dg1
00041 0+000048 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00042 0+00004c <[^>]*> 8ca5000c   lw     a1,12\(a1\)
00043 [      ]*4c: R_MIPS_LO16    dg1
00044 0+000050 <[^>]*> 3c050000   lui    a1,0x0
00045 [      ]*50: R_MIPS_HI16    \.data
00046 0+000054 <[^>]*> [26]4a5003c       (|d)addiu     a1,a1,60
00047 [      ]*54: R_MIPS_LO16    \.data
00048 0+000058 <[^>]*> 3c050000   lui    a1,0x0
00049 [      ]*58: R_MIPS_HI16    \.data
00050 0+00005c <[^>]*> [26]4a50048       (|d)addiu     a1,a1,72
00051 [      ]*5c: R_MIPS_LO16    \.data
00052 0+000060 <[^>]*> 3c050000   lui    a1,0x0
00053 [      ]*60: R_MIPS_HI16    \.data
00054 0+000064 <[^>]*> [26]4a5003c       (|d)addiu     a1,a1,60
00055 [      ]*64: R_MIPS_LO16    \.data
00056 0+000068 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00057 0+00006c <[^>]*> 3c050000   lui    a1,0x0
00058 [      ]*6c: R_MIPS_HI16    \.data
00059 0+000070 <[^>]*> [26]4a50048       (|d)addiu     a1,a1,72
00060 [      ]*70: R_MIPS_LO16    \.data
00061 0+000074 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00062 0+000078 <[^>]*> 3c050000   lui    a1,0x0
00063 [      ]*78: R_MIPS_HI16    \.data
00064 0+00007c <[^>]*> 8ca5003c   lw     a1,60\(a1\)
00065 [      ]*7c: R_MIPS_LO16    \.data
00066 0+000080 <[^>]*> 3c050000   lui    a1,0x0
00067 [      ]*80: R_MIPS_HI16    \.data
00068 0+000084 <[^>]*> 8ca50048   lw     a1,72\(a1\)
00069 [      ]*84: R_MIPS_LO16    \.data
00070 0+000088 <[^>]*> 3c050000   lui    a1,0x0
00071 [      ]*88: R_MIPS_HI16    \.data
00072 0+00008c <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00073 0+000090 <[^>]*> 8ca5003c   lw     a1,60\(a1\)
00074 [      ]*90: R_MIPS_LO16    \.data
00075 0+000094 <[^>]*> 3c050000   lui    a1,0x0
00076 [      ]*94: R_MIPS_HI16    \.data
00077 0+000098 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00078 0+00009c <[^>]*> 8ca50048   lw     a1,72\(a1\)
00079 [      ]*9c: R_MIPS_LO16    \.data
00080 0+0000a0 <[^>]*> 3c050000   lui    a1,0x0
00081 [      ]*a0: R_MIPS_HI16    dg2
00082 0+0000a4 <[^>]*> [26]4a50000       (|d)addiu     a1,a1,0
00083 [      ]*a4: R_MIPS_LO16    dg2
00084 0+0000a8 <[^>]*> 3c050000   lui    a1,0x0
00085 [      ]*a8: R_MIPS_HI16    dg2
00086 0+0000ac <[^>]*> [26]4a5000c       (|d)addiu     a1,a1,12
00087 [      ]*ac: R_MIPS_LO16    dg2
00088 0+0000b0 <[^>]*> 3c050000   lui    a1,0x0
00089 [      ]*b0: R_MIPS_HI16    dg2
00090 0+0000b4 <[^>]*> [26]4a50000       (|d)addiu     a1,a1,0
00091 [      ]*b4: R_MIPS_LO16    dg2
00092 0+0000b8 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00093 0+0000bc <[^>]*> 3c050000   lui    a1,0x0
00094 [      ]*bc: R_MIPS_HI16    dg2
00095 0+0000c0 <[^>]*> [26]4a5000c       (|d)addiu     a1,a1,12
00096 [      ]*c0: R_MIPS_LO16    dg2
00097 0+0000c4 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00098 0+0000c8 <[^>]*> 3c050000   lui    a1,0x0
00099 [      ]*c8: R_MIPS_HI16    dg2
00100 0+0000cc <[^>]*> 8ca50000   lw     a1,0\(a1\)
00101 [      ]*cc: R_MIPS_LO16    dg2
00102 0+0000d0 <[^>]*> 3c050000   lui    a1,0x0
00103 [      ]*d0: R_MIPS_HI16    dg2
00104 0+0000d4 <[^>]*> 8ca5000c   lw     a1,12\(a1\)
00105 [      ]*d4: R_MIPS_LO16    dg2
00106 0+0000d8 <[^>]*> 3c050000   lui    a1,0x0
00107 [      ]*d8: R_MIPS_HI16    dg2
00108 0+0000dc <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00109 0+0000e0 <[^>]*> 8ca50000   lw     a1,0\(a1\)
00110 [      ]*e0: R_MIPS_LO16    dg2
00111 0+0000e4 <[^>]*> 3c050000   lui    a1,0x0
00112 [      ]*e4: R_MIPS_HI16    dg2
00113 0+0000e8 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00114 0+0000ec <[^>]*> 8ca5000c   lw     a1,12\(a1\)
00115 [      ]*ec: R_MIPS_LO16    dg2
00116 0+0000f0 <[^>]*> 3c050000   lui    a1,0x0
00117 [      ]*f0: R_MIPS_HI16    \.data
00118 0+0000f4 <[^>]*> [26]4a500b4       (|d)addiu     a1,a1,180
00119 [      ]*f4: R_MIPS_LO16    \.data
00120 0+0000f8 <[^>]*> 3c050000   lui    a1,0x0
00121 [      ]*f8: R_MIPS_HI16    \.data
00122 0+0000fc <[^>]*> [26]4a500c0       (|d)addiu     a1,a1,192
00123 [      ]*fc: R_MIPS_LO16    \.data
00124 0+000100 <[^>]*> 3c050000   lui    a1,0x0
00125 [      ]*100: R_MIPS_HI16   \.data
00126 0+000104 <[^>]*> [26]4a500b4       (|d)addiu     a1,a1,180
00127 [      ]*104: R_MIPS_LO16   \.data
00128 0+000108 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00129 0+00010c <[^>]*> 3c050000   lui    a1,0x0
00130 [      ]*10c: R_MIPS_HI16   \.data
00131 0+000110 <[^>]*> [26]4a500c0       (|d)addiu     a1,a1,192
00132 [      ]*110: R_MIPS_LO16   \.data
00133 0+000114 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00134 0+000118 <[^>]*> 3c050000   lui    a1,0x0
00135 [      ]*118: R_MIPS_HI16   \.data
00136 0+00011c <[^>]*> 8ca500b4   lw     a1,180\(a1\)
00137 [      ]*11c: R_MIPS_LO16   \.data
00138 0+000120 <[^>]*> 3c050000   lui    a1,0x0
00139 [      ]*120: R_MIPS_HI16   \.data
00140 0+000124 <[^>]*> 8ca500c0   lw     a1,192\(a1\)
00141 [      ]*124: R_MIPS_LO16   \.data
00142 0+000128 <[^>]*> 3c050000   lui    a1,0x0
00143 [      ]*128: R_MIPS_HI16   \.data
00144 0+00012c <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00145 0+000130 <[^>]*> 8ca500b4   lw     a1,180\(a1\)
00146 [      ]*130: R_MIPS_LO16   \.data
00147 0+000134 <[^>]*> 3c050000   lui    a1,0x0
00148 [      ]*134: R_MIPS_HI16   \.data
00149 0+000138 <[^>]*> 00b1282[1d]       (|d)addu      a1,a1,s1
00150 0+00013c <[^>]*> 8ca500c0   lw     a1,192\(a1\)
00151 [      ]*13c: R_MIPS_LO16   \.data
00152        \.\.\.