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cell-binutils  2.17cvs20070401
bfin-defs.h
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00001 /* bfin-defs.h ADI Blackfin gas header file
00002    Copyright 2005, 2006
00003    Free Software Foundation, Inc.
00004 
00005    This file is part of GAS, the GNU Assembler.
00006 
00007    GAS is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2, or (at your option)
00010    any later version.
00011 
00012    GAS is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with GAS; see the file COPYING.  If not, write to the Free
00019    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00020    02110-1301, USA.  */
00021 
00022 #ifndef BFIN_PARSE_H
00023 #define BFIN_PARSE_H  
00024 
00025 #define PCREL 1
00026 #define CODE_FRAG_SIZE 4096  /* 1 page.  */  
00027 
00028 
00029 /* Definition for all status bits.  */
00030 typedef enum
00031 {
00032   c_0,
00033   c_1,
00034   c_4,
00035   c_2,
00036   c_uimm2,
00037   c_uimm3,
00038   c_imm3,
00039   c_pcrel4, 
00040   c_imm4,
00041   c_uimm4s4,
00042   c_uimm4,
00043   c_uimm4s2,
00044   c_negimm5s4,
00045   c_imm5,
00046   c_uimm5,
00047   c_imm6,  
00048   c_imm7,
00049   c_imm8,
00050   c_uimm8,
00051   c_pcrel8,
00052   c_uimm8s4,
00053   c_pcrel8s4,
00054   c_lppcrel10,
00055   c_pcrel10, 
00056   c_pcrel12,
00057   c_imm16s4,
00058   c_luimm16,
00059   c_imm16,
00060   c_huimm16,
00061   c_rimm16,
00062   c_imm16s2,
00063   c_uimm16s4, 
00064   c_uimm16,
00065   c_pcrel24 
00066 } const_forms_t;
00067 
00068 
00069 /* High-Nibble: group code, low nibble: register code.  */
00070 
00071 
00072 #define T_REG_R       0x00
00073 #define T_REG_P       0x10
00074 #define T_REG_I       0x20
00075 #define T_REG_B       0x30
00076 #define T_REG_L       0x34
00077 #define T_REG_M       0x24
00078 #define T_REG_A       0x40
00079 
00080 /* All registers above this value don't
00081    belong to a usuable register group.  */
00082 #define T_NOGROUP     0xa0
00083 
00084 /* Flags.  */
00085 #define F_REG_ALL    0x1000
00086 #define F_REG_HIGH   0x2000  /* Half register: high half.  */
00087 
00088 enum machine_registers
00089 {
00090   REG_R0    = T_REG_R, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, 
00091   REG_P0    = T_REG_P, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
00092   REG_I0    = T_REG_I, REG_I1, REG_I2, REG_I3,
00093   REG_M0    = T_REG_M, REG_M1, REG_M2, REG_M3, 
00094   REG_B0    = T_REG_B, REG_B1, REG_B2, REG_B3,
00095   REG_L0    = T_REG_L, REG_L1, REG_L2, REG_L3, 
00096   REG_A0x   = T_REG_A, REG_A0w, REG_A1x, REG_A1w,
00097   REG_ASTAT = 0x46,
00098   REG_RETS  = 0x47,
00099   REG_LC0   = 0x60, REG_LT0, REG_LB0,  REG_LC1, REG_LT1, REG_LB1,
00100               REG_CYCLES, REG_CYCLES2,
00101   REG_USP   = 0x70, REG_SEQSTAT, REG_SYSCFG,
00102              REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, 
00103 
00104 /* These don't have groups.  */
00105   REG_sftreset = T_NOGROUP, REG_omode, REG_excause, REG_emucause,
00106                 REG_idle_req, REG_hwerrcause,
00107   REG_A0       = 0xc0, REG_A1, REG_CC,
00108 /* Pseudo registers, used only for distinction from symbols.  */
00109                REG_RL0, REG_RL1, REG_RL2, REG_RL3,
00110                REG_RL4, REG_RL5, REG_RL6, REG_RL7, 
00111                REG_RH0, REG_RH1, REG_RH2, REG_RH3,
00112                REG_RH4, REG_RH5, REG_RH6, REG_RH7, 
00113                REG_LASTREG
00114 };
00115 
00116 /* Status register flags.  */
00117 
00118 enum statusflags
00119 {
00120   S_AZ = 0,
00121   S_AN,
00122   S_AQ = 6,
00123   S_AC0 = 12,
00124   S_AC1,
00125   S_AV0 = 16,
00126   S_AV0S,
00127   S_AV1,
00128   S_AV1S,
00129   S_V = 24,
00130   S_VS = 25
00131 }; 
00132 
00133 
00134 enum reg_class
00135 {
00136   rc_dregs_lo,
00137   rc_dregs_hi,
00138   rc_dregs,
00139   rc_dregs_pair,
00140   rc_pregs,
00141   rc_spfp,
00142   rc_dregs_hilo,
00143   rc_accum_ext,
00144   rc_accum_word,
00145   rc_accum,
00146   rc_iregs,
00147   rc_mregs,
00148   rc_bregs,
00149   rc_lregs,
00150   rc_dpregs,
00151   rc_gregs,
00152   rc_regs,
00153   rc_statbits,
00154   rc_ignore_bits,
00155   rc_ccstat,
00156   rc_counters,
00157   rc_dregs2_sysregs1,
00158   rc_open,
00159   rc_sysregs2,
00160   rc_sysregs3,
00161   rc_allregs,
00162   LIM_REG_CLASSES
00163 };
00164 
00165 /* mmod field.  */
00166 #define M_S2RND 1
00167 #define M_T     2
00168 #define M_W32   3
00169 #define M_FU    4
00170 #define M_TFU   6
00171 #define M_IS    8
00172 #define M_ISS2  9
00173 #define M_IH    11
00174 #define M_IU    12
00175 
00176 /* Register type checking macros.  */
00177 
00178 #define CODE_MASK  0x07
00179 #define CLASS_MASK 0xf0
00180 
00181 #define REG_SAME(a, b)   ((a).regno == (b).regno)
00182 #define REG_EQUAL(a, b)  (((a).regno & CODE_MASK) == ((b).regno & CODE_MASK))
00183 #define REG_CLASS(a)     ((a.regno) & 0xf0)
00184 #define IS_A1(a)         ((a).regno == REG_A1)
00185 #define IS_H(a)          ((a).regno & F_REG_HIGH ? 1: 0)
00186 #define IS_EVEN(r)       (r.regno % 2 == 0)
00187 #define IS_HCOMPL(a, b)  (REG_EQUAL(a, b) && \
00188                          ((a).regno & F_REG_HIGH) != ((b).regno & F_REG_HIGH))
00189 
00190 /* register type checking.  */
00191 #define _TYPECHECK(r, x) (((r).regno & CLASS_MASK) == T_REG_##x)
00192 
00193 #define IS_DREG(r)       _TYPECHECK(r, R)
00194 #define IS_DREG_H(r)     (_TYPECHECK(r, R) && IS_H(r))
00195 #define IS_DREG_L(r)     (_TYPECHECK(r, R) && !IS_H(r))
00196 #define IS_PREG(r)       _TYPECHECK(r, P)
00197 #define IS_IREG(r)       (((r).regno & 0xf4) == T_REG_I)
00198 #define IS_MREG(r)       (((r).regno & 0xf4) == T_REG_M)
00199 #define IS_BREG(r)       (((r).regno & 0xf4) == T_REG_B)
00200 #define IS_LREG(r)       (((r).regno & 0xf4) == T_REG_L)
00201 #define IS_CREG(r)       ((r).regno == REG_LC0 || (r).regno == REG_LC1)
00202 #define IS_ALLREG(r)     ((r).regno < T_NOGROUP)
00203 
00204 /* Expression value macros.  */
00205 
00206 typedef enum
00207 { 
00208   ones_compl,
00209   twos_compl,
00210   mult,
00211   divide,
00212   mod,
00213   add,
00214   sub,
00215   lsh,
00216   rsh,
00217   logand,
00218   logior,
00219   logxor
00220 } expr_opcodes_t;
00221 
00222 struct expressionS;
00223 
00224 #define SYMBOL_T       symbolS*
00225  
00226 struct expression_cell
00227 {
00228   int value;
00229   SYMBOL_T symbol;
00230 };
00231 
00232 /* User Type Definitions.  */
00233 struct bfin_insn
00234 {
00235   unsigned long value;
00236   struct bfin_insn *next;
00237   struct expression_cell *exp;
00238   int pcrel;
00239   int reloc;
00240 };
00241     
00242 #define INSTR_T struct bfin_insn*
00243 #define EXPR_T  struct expression_cell* 
00244 
00245 typedef struct expr_node_struct Expr_Node;
00246  
00247 extern INSTR_T gencode (unsigned long x);
00248 extern INSTR_T conscode (INSTR_T head, INSTR_T tail);   
00249 extern INSTR_T conctcode (INSTR_T head, INSTR_T tail);
00250 extern INSTR_T note_reloc
00251        (INSTR_T code, Expr_Node *, int reloc,int pcrel);
00252 extern INSTR_T note_reloc1
00253        (INSTR_T code, const char * sym, int reloc, int pcrel);
00254 extern INSTR_T note_reloc2
00255        (INSTR_T code, const char *symbol, int reloc, int value, int pcrel);
00256  
00257 /* Types of expressions.  */
00258 typedef enum 
00259 {
00260   Expr_Node_Binop,          /* Binary operator.  */
00261   Expr_Node_Unop,           /* Unary operator.  */
00262   Expr_Node_Reloc,          /* Symbol to be relocated.  */
00263   Expr_Node_GOT_Reloc,             /* Symbol to be relocated using the GOT.  */
00264   Expr_Node_Constant               /* Constant.  */
00265 } Expr_Node_Type;
00266 
00267 /* Types of operators.  */
00268 typedef enum 
00269 {
00270   Expr_Op_Type_Add,
00271   Expr_Op_Type_Sub,
00272   Expr_Op_Type_Mult,
00273   Expr_Op_Type_Div,
00274   Expr_Op_Type_Mod,
00275   Expr_Op_Type_Lshift,
00276   Expr_Op_Type_Rshift,
00277   Expr_Op_Type_BAND,        /* Bitwise AND.  */
00278   Expr_Op_Type_BOR,         /* Bitwise OR.  */
00279   Expr_Op_Type_BXOR,        /* Bitwise exclusive OR.  */
00280   Expr_Op_Type_LAND,        /* Logical AND.  */
00281   Expr_Op_Type_LOR,         /* Logical OR.  */
00282   Expr_Op_Type_NEG,
00283   Expr_Op_Type_COMP         /* Complement.  */
00284 } Expr_Op_Type;
00285 
00286 /* The value that can be stored ... depends on type.  */
00287 typedef union
00288 {
00289   const char *s_value;             /* if relocation symbol, the text.  */
00290   int i_value;                     /* if constant, the value.  */
00291   Expr_Op_Type op_value;    /* if operator, the value.  */
00292 } Expr_Node_Value;
00293 
00294 /* The expression node.  */
00295 struct expr_node_struct
00296 {
00297   Expr_Node_Type     type;
00298   Expr_Node_Value    value;
00299   Expr_Node          *Left_Child;
00300   Expr_Node          *Right_Child;
00301 };
00302 
00303 
00304 /* Operations on the expression node.  */
00305 Expr_Node *Expr_Node_Create (Expr_Node_Type type, 
00306                        Expr_Node_Value value, 
00307                       Expr_Node *Left_Child, 
00308                       Expr_Node *Right_Child);
00309 
00310 /* Generate the reloc structure as a series of instructions.  */
00311 INSTR_T Expr_Node_Gen_Reloc (Expr_Node *head, int parent_reloc);
00312  
00313 #define MKREF(x)     mkexpr (0,x)
00314 #define ALLOCATE(x)  malloc (x)
00315  
00316 #define NULL_CODE ((INSTR_T) 0)
00317 
00318 #ifndef EXPR_VALUE
00319 #define EXPR_VALUE(x)  (((x)->type == Expr_Node_Constant) ? ((x)->value.i_value) : 0)
00320 #endif
00321 #ifndef EXPR_SYMBOL
00322 #define EXPR_SYMBOL(x) ((x)->symbol)
00323 #endif
00324 
00325 
00326 typedef long reg_t;
00327 
00328 
00329 typedef struct _register
00330 {
00331   reg_t regno;       /* Register ID as defined in machine_registers.  */
00332   int   flags;
00333 } Register;
00334 
00335 
00336 typedef struct _macfunc
00337 {
00338   char n;
00339   char op;
00340   char w;
00341   char P;
00342   Register dst;
00343   Register s0;
00344   Register s1;
00345 } Macfunc;
00346 
00347 typedef struct _opt_mode
00348 {
00349   int MM;
00350   int mod;
00351 } Opt_mode;
00352 
00353 typedef enum
00354 {
00355   SEMANTIC_ERROR,
00356   NO_INSN_GENERATED,
00357   INSN_GENERATED
00358 } parse_state;
00359 
00360 
00361 #ifdef __cplusplus
00362 extern "C" {
00363 #endif
00364 
00365 extern int debug_codeselection;
00366 
00367 void error (char *format, ...);
00368 void warn (char *format, ...);
00369 int  semantic_error (char *syntax);
00370 void semantic_error_2 (char *syntax);
00371 
00372 EXPR_T mkexpr (int, SYMBOL_T);
00373 
00374 /* Defined in bfin-lex.l.  */
00375 void set_start_state (void);
00376 
00377 #ifdef __cplusplus
00378 }
00379 #endif
00380 
00381 #endif  /* BFIN_PARSE_H */
00382