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cell-binutils  2.17cvs20070401
bfin-aux.h
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00001 /* bfin-aux.h ADI Blackfin Header file for gas
00002    Copyright 2005
00003    Free Software Foundation, Inc.
00004 
00005    This file is part of GAS, the GNU Assembler.
00006 
00007    GAS is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2, or (at your option)
00010    any later version.
00011 
00012    GAS is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with GAS; see the file COPYING.  If not, write to the Free
00019    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
00020    02110-1301, USA.  */
00021 
00022 #include "bfin-defs.h"
00023 
00024 #define REG_T Register *
00025 
00026 INSTR_T
00027 bfin_gen_dsp32mac (int op1, int mm, int mmod, int w1, int p,
00028               int h01, int h11, int h00, int h10,
00029              int op0, REG_T dst, REG_T src0, REG_T src1, int w0);
00030 
00031 INSTR_T
00032 bfin_gen_dsp32mult (int op1, int mm, int mmod, int w1, int p,
00033                int h01, int h11, int h00, int h10,
00034               int op0, REG_T dst, REG_T src0, REG_T src1, int w0);
00035 
00036 INSTR_T
00037 bfin_gen_dsp32alu (int HL, int aopcde, int aop, int s, int x,
00038               REG_T dst0, REG_T dst1, REG_T src0, REG_T src1);
00039 
00040 INSTR_T
00041 bfin_gen_dsp32shift (int sopcde, REG_T dst0, REG_T src0, REG_T src1,
00042                 int sop, int hls);
00043 
00044 INSTR_T
00045 bfin_gen_dsp32shiftimm (int sopcde, REG_T dst0, int immag, REG_T src1,
00046                    int sop, int hls);
00047 
00048 INSTR_T
00049 bfin_gen_ldimmhalf (REG_T reg, int h, int s, int z, Expr_Node *hword,
00050                int reloc);
00051 
00052 INSTR_T
00053 bfin_gen_ldstidxi (REG_T ptr, REG_T reg, int w, int sz, int z,
00054               Expr_Node *offset);
00055 
00056 INSTR_T
00057 bfin_gen_ldst (REG_T ptr, REG_T reg, int aop, int sz, int z, int w);
00058 
00059 INSTR_T
00060 bfin_gen_ldstii (REG_T ptr, REG_T reg, Expr_Node *offset, int w, int op);
00061 
00062 INSTR_T
00063 bfin_gen_ldstiifp (REG_T reg, Expr_Node *offset, int w);
00064 
00065 INSTR_T
00066 bfin_gen_ldstpmod (REG_T ptr, REG_T reg, int aop, int w, REG_T idx);
00067 
00068 INSTR_T
00069 bfin_gen_dspldst (REG_T i, REG_T reg, int aop, int w, int m);
00070 
00071 INSTR_T
00072 bfin_gen_alu2op (REG_T dst, REG_T src, int opc);
00073 
00074 INSTR_T
00075 bfin_gen_compi2opd (REG_T dst, int src, int op);
00076 
00077 INSTR_T
00078 bfin_gen_compi2opp (REG_T dst, int src, int op);
00079 
00080 INSTR_T
00081 bfin_gen_dagmodik (REG_T i, int op);
00082 
00083 INSTR_T
00084 bfin_gen_dagmodim (REG_T i, REG_T m, int op, int br);
00085 
00086 INSTR_T
00087 bfin_gen_ptr2op (REG_T dst, REG_T src, int opc);
00088 
00089 INSTR_T
00090 bfin_gen_logi2op (int dst, int src, int opc);
00091 
00092 INSTR_T
00093 bfin_gen_comp3op (REG_T src0, REG_T src1, REG_T dst, int opc);
00094 
00095 INSTR_T
00096 bfin_gen_ccmv (REG_T src, REG_T dst, int t);
00097 
00098 INSTR_T
00099 bfin_gen_ccflag (REG_T x, int y, int opc, int i, int g);
00100 
00101 INSTR_T
00102 bfin_gen_cc2stat (int cbit, int op, int d);
00103 
00104 INSTR_T
00105 bfin_gen_regmv (REG_T src, REG_T dst);
00106 
00107 INSTR_T
00108 bfin_gen_cc2dreg (int op, REG_T reg);
00109 
00110 INSTR_T
00111 bfin_gen_brcc (int t, int b, Expr_Node *offset);
00112 
00113 INSTR_T
00114 bfin_gen_ujump (Expr_Node *offset);
00115 
00116 INSTR_T
00117 bfin_gen_cactrl (REG_T reg, int a, int op);
00118 
00119 INSTR_T
00120 bfin_gen_progctrl (int prgfunc, int poprnd);
00121 
00122 INSTR_T
00123 bfin_gen_loopsetup (Expr_Node *soffset, REG_T c, int rop,
00124                Expr_Node *eoffset, REG_T reg);
00125 
00126 INSTR_T
00127 bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg);
00128 
00129 INSTR_T
00130 bfin_gen_pushpopmultiple (int dr, int pr, int d, int p, int w);
00131 
00132 INSTR_T
00133 bfin_gen_pushpopreg (REG_T reg, int w);
00134 
00135 INSTR_T
00136 bfin_gen_calla (Expr_Node *addr, int s);
00137 
00138 INSTR_T
00139 bfin_gen_linkage (int r, int framesize);
00140 
00141 INSTR_T
00142 bfin_gen_pseudodbg (int fn, int reg, int grp);
00143 
00144 INSTR_T
00145 bfin_gen_pseudodbg_assert (int dbgop, REG_T regtest, int expected);
00146 
00147 bfd_boolean
00148 bfin_resource_conflict (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2);
00149 
00150 INSTR_T
00151 bfin_gen_multi_instr (INSTR_T dsp32, INSTR_T dsp16_grp1, INSTR_T dsp16_grp2);