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cell-binutils  2.17cvs20070401
avr-dis.c
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00001 /* Disassemble AVR instructions.
00002    Copyright 1999, 2000, 2002, 2004, 2005, 2006
00003    Free Software Foundation, Inc.
00004 
00005    Contributed by Denis Chertykov <denisc@overta.ru>
00006 
00007    This program is free software; you can redistribute it and/or modify
00008    it under the terms of the GNU General Public License as published by
00009    the Free Software Foundation; either version 2 of the License, or
00010    (at your option) any later version.
00011 
00012    This program is distributed in the hope that it will be useful,
00013    but WITHOUT ANY WARRANTY; without even the implied warranty of
00014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00015    GNU General Public License for more details.
00016 
00017    You should have received a copy of the GNU General Public License
00018    along with this program; if not, write to the Free Software
00019    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
00020 
00021 #include <assert.h>
00022 #include "sysdep.h"
00023 #include "dis-asm.h"
00024 #include "opintl.h"
00025 #include "libiberty.h"
00026 
00027 struct avr_opcodes_s
00028 {
00029   char *name;
00030   char *constraints;
00031   char *opcode;
00032   int insn_size;            /* In words.  */
00033   int isa;
00034   unsigned int bin_opcode;
00035 };
00036 
00037 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
00038 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
00039 
00040 const struct avr_opcodes_s avr_opcodes[] =
00041 {
00042   #include "opcode/avr.h"
00043   {NULL, NULL, NULL, 0, 0, 0}
00044 };
00045 
00046 static const char * comment_start = "0x";
00047 
00048 static int
00049 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
00050              char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
00051 {
00052   int ok = 1;
00053   *sym = 0;
00054 
00055   switch (constraint)
00056     {
00057       /* Any register operand.  */
00058     case 'r':
00059       if (regs)
00060        insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register.  */
00061       else
00062        insn = (insn & 0x01f0) >> 4; /* Destination register.  */
00063       
00064       sprintf (buf, "r%d", insn);
00065       break;
00066 
00067     case 'd':
00068       if (regs)
00069        sprintf (buf, "r%d", 16 + (insn & 0xf));
00070       else
00071        sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
00072       break;
00073       
00074     case 'w':
00075       sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
00076       break;
00077       
00078     case 'a':
00079       if (regs)
00080        sprintf (buf, "r%d", 16 + (insn & 7));
00081       else
00082        sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
00083       break;
00084 
00085     case 'v':
00086       if (regs)
00087        sprintf (buf, "r%d", (insn & 0xf) * 2);
00088       else
00089        sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
00090       break;
00091 
00092     case 'e':
00093       {
00094        char *xyz;
00095 
00096        switch (insn & 0x100f)
00097          {
00098            case 0x0000: xyz = "Z";  break;
00099            case 0x1001: xyz = "Z+"; break;
00100            case 0x1002: xyz = "-Z"; break;
00101            case 0x0008: xyz = "Y";  break;
00102            case 0x1009: xyz = "Y+"; break;
00103            case 0x100a: xyz = "-Y"; break;
00104            case 0x100c: xyz = "X";  break;
00105            case 0x100d: xyz = "X+"; break;
00106            case 0x100e: xyz = "-X"; break;
00107            default: xyz = "??"; ok = 0;
00108          }
00109        sprintf (buf, xyz);
00110 
00111        if (AVR_UNDEF_P (insn))
00112          sprintf (comment, _("undefined"));
00113       }
00114       break;
00115 
00116     case 'z':
00117       *buf++ = 'Z';
00118       if (insn & 0x1)
00119        *buf++ = '+';
00120       *buf = '\0';
00121       if (AVR_UNDEF_P (insn))
00122        sprintf (comment, _("undefined"));
00123       break;
00124 
00125     case 'b':
00126       {
00127        unsigned int x;
00128        
00129        x = (insn & 7);
00130        x |= (insn >> 7) & (3 << 3);
00131        x |= (insn >> 8) & (1 << 5);
00132        
00133        if (insn & 0x8)
00134          *buf++ = 'Y';
00135        else
00136          *buf++ = 'Z';
00137        sprintf (buf, "+%d", x);
00138        sprintf (comment, "0x%02x", x);
00139       }
00140       break;
00141       
00142     case 'h':
00143       *sym = 1;
00144       *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
00145       /* See PR binutils/2454.  Ideally we would like to display the hex
00146         value of the address only once, but this would mean recoding
00147         objdump_print_address() which would affect many targets.  */
00148       sprintf (buf, "%#lx", (unsigned long) *sym_addr);      
00149       sprintf (comment, comment_start);
00150       break;
00151       
00152     case 'L':
00153       {
00154        int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
00155        sprintf (buf, ".%+-8d", rel_addr);
00156         *sym = 1;
00157         *sym_addr = pc + 2 + rel_addr;
00158        sprintf (comment, comment_start);
00159       }
00160       break;
00161 
00162     case 'l':
00163       {
00164        int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
00165 
00166        sprintf (buf, ".%+-8d", rel_addr);
00167         *sym = 1;
00168         *sym_addr = pc + 2 + rel_addr;
00169        sprintf (comment, comment_start);
00170       }
00171       break;
00172 
00173     case 'i':
00174       sprintf (buf, "0x%04X", insn2);
00175       break;
00176       
00177     case 'M':
00178       sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
00179       sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
00180       break;
00181 
00182     case 'n':
00183       sprintf (buf, "??");
00184       fprintf (stderr, _("Internal disassembler error"));
00185       ok = 0;
00186       break;
00187       
00188     case 'K':
00189       {
00190        unsigned int x;
00191 
00192        x = (insn & 0xf) | ((insn >> 2) & 0x30);
00193        sprintf (buf, "0x%02x", x);
00194        sprintf (comment, "%d", x);
00195       }
00196       break;
00197       
00198     case 's':
00199       sprintf (buf, "%d", insn & 7);
00200       break;
00201       
00202     case 'S':
00203       sprintf (buf, "%d", (insn >> 4) & 7);
00204       break;
00205       
00206     case 'P':
00207       {
00208        unsigned int x;
00209 
00210        x = (insn & 0xf);
00211        x |= (insn >> 5) & 0x30;
00212        sprintf (buf, "0x%02x", x);
00213        sprintf (comment, "%d", x);
00214       }
00215       break;
00216 
00217     case 'p':
00218       {
00219        unsigned int x;
00220        
00221        x = (insn >> 3) & 0x1f;
00222        sprintf (buf, "0x%02x", x);
00223        sprintf (comment, "%d", x);
00224       }
00225       break;
00226       
00227     case '?':
00228       *buf = '\0';
00229       break;
00230       
00231     default:
00232       sprintf (buf, "??");
00233       fprintf (stderr, _("unknown constraint `%c'"), constraint);
00234       ok = 0;
00235     }
00236 
00237     return ok;
00238 }
00239 
00240 static unsigned short
00241 avrdis_opcode (bfd_vma addr, disassemble_info *info)
00242 {
00243   bfd_byte buffer[2];
00244   int status;
00245 
00246   status = info->read_memory_func (addr, buffer, 2, info);
00247 
00248   if (status == 0)
00249     return bfd_getl16 (buffer);
00250 
00251   info->memory_error_func (status, addr, info);
00252   return -1;
00253 }
00254 
00255 
00256 int
00257 print_insn_avr (bfd_vma addr, disassemble_info *info)
00258 {
00259   unsigned int insn, insn2;
00260   const struct avr_opcodes_s *opcode;
00261   static unsigned int *maskptr;
00262   void *stream = info->stream;
00263   fprintf_ftype prin = info->fprintf_func;
00264   static unsigned int *avr_bin_masks;
00265   static int initialized;
00266   int cmd_len = 2;
00267   int ok = 0;
00268   char op1[20], op2[20], comment1[40], comment2[40];
00269   int sym_op1 = 0, sym_op2 = 0;
00270   bfd_vma sym_addr1, sym_addr2;
00271 
00272 
00273   if (!initialized)
00274     {
00275       unsigned int nopcodes;
00276 
00277       /* PR 4045: Try to avoid duplicating the 0x prefix that
00278         objdump_print_addr() will put on addresses when there
00279         is no symbol table available.  */
00280       if (info->symtab_size == 0)
00281        comment_start = " ";
00282 
00283       nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
00284       
00285       avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int));
00286 
00287       for (opcode = avr_opcodes, maskptr = avr_bin_masks;
00288           opcode->name;
00289           opcode++, maskptr++)
00290        {
00291          char * s;
00292          unsigned int bin = 0;
00293          unsigned int mask = 0;
00294        
00295          for (s = opcode->opcode; *s; ++s)
00296            {
00297              bin <<= 1;
00298              mask <<= 1;
00299              bin |= (*s == '1');
00300              mask |= (*s == '1' || *s == '0');
00301            }
00302          assert (s - opcode->opcode == 16);
00303          assert (opcode->bin_opcode == bin);
00304          *maskptr = mask;
00305        }
00306 
00307       initialized = 1;
00308     }
00309 
00310   insn = avrdis_opcode (addr, info);
00311   
00312   for (opcode = avr_opcodes, maskptr = avr_bin_masks;
00313        opcode->name;
00314        opcode++, maskptr++)
00315     if ((insn & *maskptr) == opcode->bin_opcode)
00316       break;
00317   
00318   /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
00319      `std b+0,r' as `st b,r' (next entry in the table).  */
00320 
00321   if (AVR_DISP0_P (insn))
00322     opcode++;
00323 
00324   op1[0] = 0;
00325   op2[0] = 0;
00326   comment1[0] = 0;
00327   comment2[0] = 0;
00328 
00329   if (opcode->name)
00330     {
00331       char *op = opcode->constraints;
00332 
00333       insn2 = 0;
00334       ok = 1;
00335 
00336       if (opcode->insn_size > 1)
00337        {
00338          insn2 = avrdis_opcode (addr + 2, info);
00339          cmd_len = 4;
00340        }
00341 
00342       if (*op && *op != '?')
00343        {
00344          int regs = REGISTER_P (*op);
00345 
00346          ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
00347 
00348          if (ok && *(++op) == ',')
00349            ok = avr_operand (insn, insn2, addr, *(++op), op2,
00350                            *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
00351        }
00352     }
00353 
00354   if (!ok)
00355     {
00356       /* Unknown opcode, or invalid combination of operands.  */
00357       sprintf (op1, "0x%04x", insn);
00358       op2[0] = 0;
00359       sprintf (comment1, "????");
00360       comment2[0] = 0;
00361     }
00362 
00363   (*prin) (stream, "%s", ok ? opcode->name : ".word");
00364 
00365   if (*op1)
00366       (*prin) (stream, "\t%s", op1);
00367 
00368   if (*op2)
00369     (*prin) (stream, ", %s", op2);
00370 
00371   if (*comment1)
00372     (*prin) (stream, "\t; %s", comment1);
00373 
00374   if (sym_op1)
00375     info->print_address_func (sym_addr1, info);
00376 
00377   if (*comment2)
00378     (*prin) (stream, " %s", comment2);
00379 
00380   if (sym_op2)
00381     info->print_address_func (sym_addr2, info);
00382 
00383   return cmd_len;
00384 }