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cell-binutils  2.17cvs20070401
address-001.d
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00001 #objdump: -D
00002 #name: D10V supported indirect addressing
00003 #as:
00004 
00005 .*: +file format elf32-d10v
00006 
00007 Disassembly of section .text:
00008 
00009 00000000 <main>:
00010    0:  78 02 72 04   ldb    r0, @r2       ->     ldub   r0, @r2
00011    4:  70 02 62 04   ld     r0, @r2       ->     ld2w   r0, @r2
00012    8:  7c 02 68 04   stb    r0, @r2       ->     st     r0, @r2
00013    c:  75 02 60 05   st2w   r0, @r2       ->     ld     r0, @r2\+
00014   10:  71 02 e8 05   ld2w   r0, @r2\+     ->     st     r0, @r2\+
00015   14:  75 02 e4 05   st2w   r0, @r2\+     ->     ld     r0, @r2-
00016   18:  73 02 ec 05   ld2w   r0, @r2-      ->     st     r0, @r2-
00017   1c:  77 02 f0 1e   st2w   r0, @r2-      ->     ldb    r0, @sp
00018   20:  79 0f 60 1e   ldub   r0, @sp       ->     ld     r0, @sp
00019   24:  71 0f 78 1e   ld2w   r0, @sp       ->     stb    r0, @sp
00020   28:  74 0f 6a 1e   st     r0, @sp       ->     st2w   r0, @sp
00021   2c:  70 0f e2 1f   ld     r0, @sp\+     ->     ld2w   r0, @sp\+
00022   30:  74 0f ea 1f   st     r0, @sp\+     ->     st2w   r0, @sp\+
00023   34:  72 0f e6 1f   ld     r0, @sp-      ->     ld2w   r0, @sp-
00024   38:  76 0f ee 1f   st     r0, @-sp      ->     st2w   r0, @-sp
00025   3c:  f8 02 80 00   ldb    r0, @\(-0x8000, r2\)
00026   40:  f9 02 80 00   ldub   r0, @\(-0x8000, r2\)
00027   44:  f0 02 80 00   ld     r0, @\(-0x8000, r2\)
00028   48:  f1 02 80 00   ld2w   r0, @\(-0x8000, r2\)
00029   4c:  fc 02 80 00   stb    r0, @\(-0x8000, r2\)
00030   50:  f4 02 80 00   st     r0, @\(-0x8000, r2\)
00031   54:  f5 02 80 00   st2w   r0, @\(-0x8000, r2\)
00032   58:  26 0d 5e 00   jmp    r13    ||     nop